Subject: [PATCH V2 4/6] arm64: Add DTS support for FSL's LS2085A SoC

From: [email-masked] (Marc Zyngier)
Date: Tue, 02 Sep 2014 11:19:16 +0100

On 02/09/14 11:05, Catalin Marinas wrote:
> On Fri, Aug 29, 2014 at 07:07:40PM +0100, bhupesh.sharma at freescale.com wrote:
>>>>>> +	memory at 80000000 {
>>>>>> +		device_type = "memory";
>>>>>> +		reg = <0x00000000 0x80000000 0 0x80000000>;
>>>>>> +		      /* DRAM space 1 - 2 GB DRAM */
>>>>>> +	};
>>>>>
>>>>> Does that mean:
>>>>>
>>>>>  - This is "DRAM space 1", populated with 2GB?
>>>>>
>>>>> Or:
>>>>>
>>>>>  - The DRAM space can be populated with 1 to 2 GB?
>>>>>
>>>>> If the former, s/ - /: / for clarity.
>>>>>
>>>>> If the latter, it might make sense to move that into board-specific
>>>>> dts files. If this can be dynamically populated ideally the
>>>>> firmware/loader would fix this up (assuming it can probe the memory).
>>>>
>>>> If the former. I will fix it up in v3.
>>>
>>> Ok. Out of curiosity, are there other DRAM spaces that might be
>>> populated?
>>
>> Yes there is another DRAM space. The 1st one is accessible within 32 bits and
>> the 2nd one is accessible from 40-bit and above. However, I was waiting
>> for the 4-level ARM64 page table patches (from Catalin) to get absorbed, as w/o the
>> same we can access only a 39-bit PA and hence can have only 3-level page table limited
>> to the 1st DRAM region (which is accessible via first 32 bits).
>>
>> Any idea, about the latest state of Catalin's patch ([1])? Has it made to linux-next?
> 
> The 48-bit VA support is in mainline but you wouldn't be able to enable
> it because KVM is still broken. Hopefully it will make it to 3.18-rc1.

Yeah, if Joel doesn't finish it by the end of the week, I'll have a look
at it myself, as it's been dragging for about 4 months now...

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...