Subject: [PATCH v4 05/12] memory: Add NVIDIA Tegra memory controller support

From: [email-masked] (Terje Bergström)
Date: Thu, 30 Oct 2014 15:47:59 +0200

On 30.10.2014 15:35, Alexandre Courbot wrote:
> Great, thanks for confirming!
> 
> Thierry, how do you want to address this? We could change the register
> for the GPU group, or (maybe preferable if we want to reflect the actual
> hardware state) add the GPUB group. I don't know if that would be easy
> though since we would have the problem of the gpusrd and gpuswr clients
> ownership (seems like they would belong to both groups?)

gpusrd and gpuswr are client IDs for GPU reads and writes on MC. GPU and
GPUB are SW group IDs for SMMU. There's no 1:1 or hierarchical mapping.

Terje