From: wangyijing@huawei•com (Yijing Wang)
To: linux-arm-kernel@lists•infradead.org
Subject: Removal of bus->msi assignment breaks MSI with stacked domains
Date: Fri, 21 Nov 2014 10:12:28 +0800 [thread overview]
Message-ID: <546E9F8C.4050307@huawei.com> (raw)
In-Reply-To: <546E9D80.3090405@linux.intel.com>
On 2014/11/21 10:03, Jiang Liu wrote:
> On 2014/11/21 9:46, Thomas Gleixner wrote:
>> On Fri, 21 Nov 2014, Yijing Wang wrote:
>>> On 2014/11/21 0:31, Marc Zyngier wrote:
>>>> Bjorn, Yijing,
>>>>
>>>> I've just realized that patch c167caf8d174 (PCI/MSI: Remove useless
>>>> bus->msi assignment) completely breaks MSI on arm64 when using the new
>>>> MSI stacked domain:
>>>
>>> Sorry, this is my first part to refactor MSI related code, now how
>>> to get pci msi_controller depends arch
>>> functions(pcibios_msi_controller() or arch_setup_msi_irq()), we are
>>> working on generic pci_host_bridge, after that, we could eventually
>>> eliminate MSI arch functions and find pci dev 's msi controller by
>>> pci_host_bridge->get_msi_controller().
>>
>> The main question is why you think that pci_host_bridge is the proper
>> place to store that information.
>>
>> On x86 we have DMAR units associated to a single device. Each DMAR
>> unit is a seperate MSI irq domain.
>>
>> Can you guarantee that the pci_host_bridge is the right point to
>> provide the association of the device to the irq domain?
>>
>> So the real question is:
>>
>> What is the association level requirement to properly identify the
>> irqdomain for a specific device on any given architecture with and
>> without IOMMU, interrupt redirection etc.
>>
>> To be honest: I don't know.
>>
>> My gut feeling tells me that it's at the device level, but I really
>> leave that decision to the experts in that field.
> Hi Thomas and Yijing,
> Since we are allocating interrupts for a PCI device, it's
> natural to get irqdomain from the PCI device itself. If we try to
> get irqdomain from a PCI bus or host bridge like
> pci_get_msi_irqdomain(bus or hostbridge), it may fail for x86
> because x86 may build per-device irqdomain theoretically.
> So the preferred interface prototype is:
> pci_get_msi_irqdomain(pci_dev) or
> pcibios_msi_controller(pci_dev)
> It's flexible enough. For architectures on which irqdomain is
> associated with PCI bus or host bridge, you could get the bus
> or host bridge from pci_dev. And it won't cause extra computation
> because you always need to get bus or host bridge from the pci_dev.
Hi Gerry, I mean we could find msi_controller by calling
pci_host_bridge->pci_get_msi_irqdomain/msi_controller(struct pci_dev *pdev)
to avoid arch weak function like pcibios_get_msi_controller(struct pci_dev *pdev). :)
> Regards!
> Gerry
>>
>> Thanks,
>>
>> tglx
>>
>
> .
>
--
Thanks!
Yijing
next prev parent reply other threads:[~2014-11-21 2:12 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-20 16:31 Removal of bus->msi assignment breaks MSI with stacked domains Marc Zyngier
2014-11-20 21:53 ` Bjorn Helgaas
2014-11-20 23:10 ` Thomas Gleixner
2014-11-20 23:30 ` Bjorn Helgaas
2014-11-21 9:33 ` Marc Zyngier
2014-11-21 1:54 ` Yijing Wang
2014-11-21 2:25 ` Jiang Liu
2014-11-21 3:46 ` Yijing Wang
2014-11-21 10:00 ` Marc Zyngier
2014-11-21 17:31 ` Bjorn Helgaas
2014-11-22 4:13 ` Yijing Wang
2014-11-21 1:22 ` Yijing Wang
2014-11-21 1:46 ` Thomas Gleixner
2014-11-21 2:03 ` Jiang Liu
2014-11-21 2:12 ` Yijing Wang [this message]
2014-11-21 2:05 ` Yijing Wang
2014-11-21 8:46 ` Lucas Stach
2014-11-21 10:29 ` Marc Zyngier
2014-11-21 10:49 ` Thomas Gleixner
2014-11-21 11:30 ` Marc Zyngier
2014-11-21 12:04 ` Yijing Wang
2014-11-21 10:11 ` Marc Zyngier
2014-11-21 11:57 ` Yijing Wang
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