Subject: regression: Clock changes in next-20141205 break at least omap4

From: [email-masked] (Stephen Boyd)
Date: Tue, 16 Dec 2014 11:01:02 -0800

On 12/15/2014 05:31 PM, Paul Walmsley wrote:
>
> I just took a quick glance at Tero's second patch, and it looks like a
> hack to me.  Better to fix the problem in the core CCF code if
> possible.  I don't think there's any reason why a PLL couldn't have
> just one parent clock.  But I'm fine with merging it as a short-term
> fix if fixing the core code is difficult or risky.

Can you describe what's wrong? Does the PLL have a mux with two inputs
that map to the same clock?

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project