From: marc.zyngier@arm•com (Marc Zyngier)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v3 14/21] ARM: imx6: convert GPC to stacked domains
Date: Tue, 13 Jan 2015 18:34:46 +0000 [thread overview]
Message-ID: <54B56546.9050407@arm.com> (raw)
In-Reply-To: <069e9a2b9e74856273b2faef90a97c87@agner.ch>
On 12/01/15 19:00, Stefan Agner wrote:
> Hi Marc,
>
> On 2015-01-12 19:26, Marc Zyngier wrote:
>> IMX6 has been (ab)using the gic_arch_extn to provide
>> wakeup from suspend, and it makes a lot of sense to convert
>> this code to use stacked domains instead.
>>
>> This patch does just this, updating the DT files to actually
>> reflect what the HW provides.
>>
>> BIG FAT WARNING: because the DTs were so far lying by not
>> exposing the fact that the GPC block is actually the first
>> interrupt controller in the chain, kernels with this patch
>> applied wont have any suspend-resume facility when booted
>> with old DTs, and old kernels with updated DTs won't even boot.
>>
>> Tested-by: Stefan Agner <stefan@agner•ch>
>> Acked-by: Stefan Agner <stefan@agner•ch>
>> Signed-off-by: Marc Zyngier <marc.zyngier@arm•com>
>> ---
>> arch/arm/boot/dts/imx6qdl.dtsi | 7 ++-
>> arch/arm/boot/dts/imx6sl.dtsi | 5 +-
>> arch/arm/boot/dts/imx6sx.dtsi | 5 +-
>> arch/arm/mach-imx/common.h | 1 -
>> arch/arm/mach-imx/gpc.c | 127 ++++++++++++++++++++++++++++++++--------
>> arch/arm/mach-imx/mach-imx6q.c | 1 -
>> arch/arm/mach-imx/mach-imx6sl.c | 1 -
>> arch/arm/mach-imx/mach-imx6sx.c | 1 -
>> 8 files changed, 117 insertions(+), 31 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
>> index 4fc03b7..aff9ded 100644
>> --- a/arch/arm/boot/dts/imx6qdl.dtsi
>> +++ b/arch/arm/boot/dts/imx6qdl.dtsi
>> @@ -53,6 +53,7 @@
>> interrupt-controller;
>> reg = <0x00a01000 0x1000>,
>> <0x00a00100 0x100>;
>> + interrupt-parent = <&intc>;
>> };
>>
>> clocks {
>> @@ -82,7 +83,7 @@
>> #address-cells = <1>;
>> #size-cells = <1>;
>> compatible = "simple-bus";
>> - interrupt-parent = <&intc>;
>> + interrupt-parent = <&gpc>;
>> ranges;
>>
>> dma_apbh: dma-apbh at 00110000 {
>> @@ -122,6 +123,7 @@
>> compatible = "arm,cortex-a9-twd-timer";
>> reg = <0x00a00600 0x20>;
>> interrupts = <1 13 0xf01>;
>> + interrupt-parent = <&intc>;
>> clocks = <&clks IMX6QDL_CLK_TWD>;
>> };
>>
>> @@ -694,8 +696,11 @@
>> gpc: gpc at 020dc000 {
>> compatible = "fsl,imx6q-gpc";
>> reg = <0x020dc000 0x4000>;
>> + interrupt-controller;
>> + #interrupt-cells = <3>;
>> interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
>> <0 90 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-parent = <&intc>;
>> };
>>
>> gpr: iomuxc-gpr at 020e0000 {
>> diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
>> index 36ab8e0..35099b7 100644
>> --- a/arch/arm/boot/dts/imx6sl.dtsi
>> +++ b/arch/arm/boot/dts/imx6sl.dtsi
>> @@ -72,6 +72,7 @@
>> interrupt-controller;
>> reg = <0x00a01000 0x1000>,
>> <0x00a00100 0x100>;
>> + interrupt-parent = <&intc>;
>> };
>>
>> clocks {
>> @@ -95,7 +96,7 @@
>> #address-cells = <1>;
>> #size-cells = <1>;
>> compatible = "simple-bus";
>> - interrupt-parent = <&intc>;
>> + interrupt-parent = <&gpc>;
>> ranges;
>>
>> ocram: sram at 00900000 {
>> @@ -603,7 +604,9 @@
>> gpc: gpc at 020dc000 {
>> compatible = "fsl,imx6sl-gpc", "fsl,imx6q-gpc";
>> reg = <0x020dc000 0x4000>;
>> + interrupt-controller;
>
> GPC is in three base device trees, and missing in all of them. So the
> first is fixed
>
> this one...
>
>> interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-parent = <&intc>;
>> };
>>
>> gpr: iomuxc-gpr at 020e0000 {
>> diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
>> index 7a24fee..c476e67 100644
>> --- a/arch/arm/boot/dts/imx6sx.dtsi
>> +++ b/arch/arm/boot/dts/imx6sx.dtsi
>> @@ -88,6 +88,7 @@
>> interrupt-controller;
>> reg = <0x00a01000 0x1000>,
>> <0x00a00100 0x100>;
>> + interrupt-parent = <&intc>;
>> };
>>
>> clocks {
>> @@ -131,7 +132,7 @@
>> #address-cells = <1>;
>> #size-cells = <1>;
>> compatible = "simple-bus";
>> - interrupt-parent = <&intc>;
>> + interrupt-parent = <&gpc>;
>> ranges;
>>
>> pmu {
>> @@ -700,7 +701,9 @@
>> gpc: gpc at 020dc000 {
>> compatible = "fsl,imx6sx-gpc", "fsl,imx6q-gpc";
>> reg = <0x020dc000 0x4000>;
>> + interrupt-controller;
>
>
> ... and this one is still missing.
>
> Sorry I did not see that the first review.
I thought I had them fixed on Sunday, but it looks like I've dropped the
fixup when rebasing. Oh well.
Thanks for the heads up, I'll squash that into the existing patch.
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2015-01-13 18:34 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-12 18:26 [PATCH v3 00/21] irqchip: gic: killing gic_arch_extn and co, slowly Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 01/21] ARM: tegra: irq: nuke leftovers from non-DT support Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 02/21] irqchip: tegra: add DT-based support for legacy interrupt controller Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 03/21] ARM: tegra: skip gic_arch_extn setup if DT has a LIC node Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 04/21] ARM: tegra: update DTs to expose legacy interrupt controller Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 05/21] DT: tegra: add binding for the " Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 06/21] ARM: tegra: remove old LIC support Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 07/21] genirq: Add irqchip_set_wake_parent Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 08/21] irqchip: crossbar: convert dra7 crossbar to stacked domains Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 09/21] DT: update ti,irq-crossbar binding Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 10/21] irqchip: GIC: get rid of routable domain Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 11/21] DT: arm,gic: kill arm,routable-irqs Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 12/21] DT: omap4/5: add binding for the wake-up generator Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 13/21] ARM: omap: convert wakeupgen to stacked domains Marc Zyngier
2015-01-14 22:28 ` Tony Lindgren
2015-01-15 14:28 ` Marc Zyngier
2015-01-15 14:40 ` Nishanth Menon
2015-01-15 14:50 ` Marc Zyngier
2015-01-15 17:04 ` Tony Lindgren
2015-01-15 17:28 ` Marc Zyngier
2015-01-15 17:57 ` Tony Lindgren
2015-01-15 18:12 ` Tony Lindgren
2015-01-12 18:26 ` [PATCH v3 14/21] ARM: imx6: convert GPC " Marc Zyngier
2015-01-12 19:00 ` Stefan Agner
2015-01-13 18:34 ` Marc Zyngier [this message]
2015-01-13 6:09 ` Linus Walleij
2015-01-13 18:36 ` Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 15/21] ARM: exynos4/5: convert pmu wakeup " Marc Zyngier
2015-01-15 6:41 ` [v3,15/21] " Pankaj Dubey
2015-01-16 19:22 ` Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 16/21] DT: exynos: update PMU binding Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 17/21] irqchip: gic: add an entry point to set up irqchip flags Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 18/21] ARM: shmobile: remove use of gic_arch_extn.irq_set_wake Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 19/21] ARM: ux500: switch from gic_arch_extn to gic_set_irqchip_flags Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 20/21] ARM: zynq: " Marc Zyngier
2015-01-12 18:26 ` [PATCH v3 21/21] irqchip: gic: Drop support for gic_arch_extn Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=54B56546.9050407@arm.com \
--to=marc.zyngier@arm$(echo .)com \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox