From: cw00.choi@samsung•com (Chanwoo Choi)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCHv3 2/8] devfreq: exynos: Add documentation for generic exynos memory bus frequency driver
Date: Tue, 20 Jan 2015 17:23:43 +0900 [thread overview]
Message-ID: <54BE108F.8090506@samsung.com> (raw)
In-Reply-To: <CAKohpomqosqxeDANC=NLBVmOUHyUoqd7Zhph7r6f7+ufYN48EQ@mail.gmail.com>
Hi Viresh,
I explained the relation between memory bus group and memory bus block on following patch[1].
- [1] https://lkml.org/lkml/2015/1/8/642
On 01/20/2015 04:19 PM, Viresh Kumar wrote:
> On 9 January 2015 at 02:48, Rob Herring <robherring2@gmail•com> wrote:
>> Adding Viresh.
>
> Sorry for being too late, I was very busy with other cpufreq stuff I was doing
> and saved this thread for later as it required me to understand it properly..
>
>>> +Required properties for memory bus block:
>>> +- clock-names : the name of clock used by the memory bus, "memory-bus".
>>> +- clocks : phandles for clock specified in "clock-names" property.
>>> +- #clock-cells: should be 1.
>>> +- frequency: the frequency table to support DVFS feature.
>>
>> So you have just defined a new OPP table format. We already have one
>> and Viresh is working to create a more extendable one. He asked about
>> what's needed in devfreq, so Viresh here you go. :)
>
> I failed to understand what's new here, probably I need more clarity on
> what we are doing here..
>
> So, this is what I see from OPPs point of view, everything else stripped out.
>
>>> + memory_bus_int: memory_bus at 1 {
>
>>> + operating-points = <
>>> + 400000 950000
>>> + 200000 950000
>>> + 133000 925000
>>> + 100000 850000
>>> + 80000 850000
>>> + 50000 850000>;
>
> So these are the OPPs your "groups" support and below ones are
> the frequencies that each block will support. Right ?
Right.
But, the frequency of OPPs is only used for devfreq ondemand governor.
After deciding the proper frequency of memory bus on ondemand governor,
exynos-bus.c (exynos memory bus frequency driver) use the frequency table
of memory bus blocks on below to change the clock rate of memory bus block.
>
>>> + blocks {
>
>>> + frequency = <
>>> + 100000
>>> + 100000
>>> + 100000
>>> + 100000
>
> Why this replication here ?
Firs of all,
I explain the hierarchy of Exynos memory buses.
For example of Exynos3250 memory bus,
This patch divide the memory bus group according to power rail (regulator).
- MIF (Memory Interface ) memory bus group uses the VDD_MIF regulator.
- INT (Internal) memory bus group uses the VDD_INT regulator.
Each memory bus group contains only one power rail(regulator) and one more memory bus blocks as follwing:
- MIF memory bus group
power rail(VDD_MIF)-->|--- memory bus for DMC (Dynamic Memory Controller) block (dmc clock)
- INT memory bus group
|--- memory bus for PERI block (aclk_100 clock)
|
|--- memory bus for DISPLAY block (aclk_160 clock)
|
|--- memory bus for ISP block (aclk_200 clock)
|
|--- memory bus for GPS block (aclk_266 clock)
power rail(VDD_INT)-->|
|--- memory bus for MCUISP block (aclk_400_mcuisp clock)
|
|--- memory bus for Leftbus block (gdl clock)
|
|--- memory bus for Rightbus block (gdr clock)
|
|--- memory bus for MFC block (mfc clock)
Exynos3250 has following table for INT memory bus group:
All clocks of INT memory bus group have to contain the same entry count
againt the number of 'virtual freqw'. So, each memory bus clock could have duplicate clocks.
------------------------------------------------------------------------
Level|virtual freq|PERI's clk|Display's clk|ISP's clk|GPS's clk| voltage|
------------------------------------------------------------------------
L6 |400000 |100000 |200000 |200000 |300000 | 95000 |
L5 |200000 |100000 |160000 |200000 |200000 | 95000 |
L4 |133000 |100000 |100000 |100000 |133000 | 92500 |
L3 |100000 |100000 |80000 |80000 |100000 | 85000 |
L2 |80000 |50000 |80000 |50000 |50000 | 85000 |
L1 |50000 |50000 |50000 |50000 |50000 | 85000 |
-------------------------------------------------------------------------
(Except for mcuisp, leftbus, rightbus, mfc block)
This table is used for devfreq ondemand governor as following:
1. ondemand governor in devfreq use the 'virtual freq' to devcide the proper
frequency for memory bus.
2. ondemand governor executes the *_target() function to set clock rate and voltage.
3. *_target() function in exynos-bus.c changes the clock rate of {PERIS|Display|ISP|GPS} clk
according to decided 'Level' by devfreq ondemand governor.
>
>>> + 50000
>>> + 50000>;
>>> + };
>
> How are the above two tables (operating-points and frequency) related
> here? What about the voltages at which these frequencies are possible ?
I explained it on the upper.
>
>>> + display_block: memory_bus_block2 {
>
>>> + frequency = <
>>> + 200000
>>> + 160000
>>> + 100000
>>> + 80000
>>> + 80000
>>> + 50000>;
>>> + };
>
>>> + isp_block: memory_bus_block3 {
>
>>> + frequency = <
>>> + 200000
>>> + 200000
>>> + 100000
>>> + 80000
>>> + 50000
>>> + 50000>;
>>> + };
>
>>> + gps_block: memory_bus_block4 {
>
>>> + frequency = <
>>> + 300000
>>> + 200000
>>> + 133000
>>> + 100000
>>> + 50000
>>> + 50000>;
>>> + };
>
> same for others as well..
I explained it on the upper.
Best Regards,
Chanwoo Choi
next prev parent reply other threads:[~2015-01-20 8:23 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-08 1:40 [PATCHv3 0/8] devfreq: Add generic exynos memory-bus frequency driver Chanwoo Choi
2015-01-08 1:40 ` [PATCHv3 1/8] devfreq: exynos: Add generic exynos memory bus " Chanwoo Choi
2015-01-08 1:40 ` [PATCHv3 2/8] devfreq: exynos: Add documentation for " Chanwoo Choi
2015-01-08 21:18 ` Rob Herring
2015-01-09 2:42 ` Chanwoo Choi
2015-01-20 7:19 ` Viresh Kumar
2015-01-20 8:23 ` Chanwoo Choi [this message]
2015-01-20 11:22 ` Viresh Kumar
2015-01-20 11:37 ` Chanwoo Choi
2015-01-21 3:17 ` Viresh Kumar
2015-01-21 4:20 ` Chanwoo Choi
2015-01-21 4:37 ` Viresh Kumar
2015-01-21 6:12 ` Chanwoo Choi
2015-01-21 6:32 ` Viresh Kumar
2015-01-08 1:40 ` [PATCHv3 3/8] ARM: dts: Add memory bus node for Exynos3250 Chanwoo Choi
2015-01-08 1:40 ` [PATCHv3 4/8] clk: samsung: exynos4: Add divider clock id for memory bus frequency Chanwoo Choi
2015-01-08 1:40 ` [PATCHv3 5/8] ARM: dts: Add memory bus node for Exynos4x12 Chanwoo Choi
2015-01-08 1:40 ` [PATCHv3 6/8] ARM: dts: Add memory bus node for Exynos4210 Chanwoo Choi
2015-01-08 1:40 ` [PATCHv3 7/8] ARM: dts: Add memory bus node for Exynos3250-based Rinato/Monk board Chanwoo Choi
2015-01-08 1:40 ` [PATCHv3 8/8] ARM: dts: Add memory bus node for Exynos4412-based TRATS2 board Chanwoo Choi
2015-02-15 0:25 ` [PATCHv3 0/8] devfreq: Add generic exynos memory-bus frequency driver Tobias Jakobi
2015-02-18 20:59 ` Tobias Jakobi
2015-02-22 23:44 ` Chanwoo Choi
2015-02-23 19:57 ` Tobias Jakobi
2015-02-23 23:55 ` Chanwoo Choi
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