Subject: [PATCHv3 2/8] devfreq: exynos: Add documentation for generic exynos memory bus frequency driver

From: [email-masked] (Chanwoo Choi)
Date: Wed, 21 Jan 2015 13:20:57 +0900

On 01/21/2015 12:17 PM, Viresh Kumar wrote:
> On 20 January 2015 at 17:07, Chanwoo Choi <[email-masked]> wrote:
>> If each bus-block has separate regulator independently, each bus-block can be registered
>> separately. But, exynos bus-blocks in mem-bus-group share the same regulator.
> 
> This can be managed easily within the driver. Just stay the highest
> voltage requested.

If the clock will be stayed on highest voltage, will reduce
the considerable benefit of power-consumption.

I think it is DFS instead of DVFS. Is it right?

> I don't think its not manageable. But it will be much more convenient
> as that will show
> the correct picture and get rid of unnecessarily virtualizing things..

What is the correct picture? do you need more detailed explanation
of Exynos memory bus structure?

Thanks,
Chanwoo