Subject: at91 clocks

From: [email-masked] (Jonas Andersson)
Date: Fri, 27 Mar 2015 15:42:06 +0100

Hi Boris,

On 2015-03-27 14:54, Boris Brezillon wrote:
>>>
>>> Could you also paste me the whole clk_summary content ?
>>>
>>>
>> http://pastie.org/10057268
> Could you try with this patch [1] ?

Yes, it works now! Thank you.

> Anyway, I don't understand why clk_set_rate returns 0 even when it
> fails to set the appropriate rate.
> Could you add some traces in drivers/clk/at91/clk-pll.c
> (clk_pll_round_rate, clk_pll_set_rate and clk_pll_get_best_div_mul) ?

Yes I'll try to do it on Monday next week.

> Thanks,
>
> Boris
>
> [1]http://code.bulix.org/gxxhc4-88138
>
Best regards
  Jonas