From: jh80.chung@samsung•com (Jaehoon Chung)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH RESEND 5/7] mmc: host: dw_mmc make IO accessors endian agnostic
Date: Mon, 30 Mar 2015 09:48:40 +0900 [thread overview]
Message-ID: <55189D68.3060900@samsung.com> (raw)
In-Reply-To: <1427282872-10563-6-git-send-email-ben.dooks@codethink.co.uk>
Hi, Ben.
Your patches (5/7~7/7) looks good to me..I will pick them..
But could you fix the checkpatch warning?
Or if you're ok. i will fix the checkpatch warning..then will apply them.
Best Regards,
Jaehoon Chung
On 03/25/2015 08:27 PM, Ben Dooks wrote:
> The dw_mmc driver does not use endian agnostic IO accessors, so fix
> the use of __raw reads and writes to be the relaxed versions.
>
> This fixes the dw_mmc driver initialisation on Altera socfpga in big endian.
>
> Signed-off-by: Ben Dooks <ben.dooks@codethink•co.uk>
> --
> CC: Linux MMC <linux-mmc@vger•kernel.org>
> CC: Linux ARM Kernel <linux-arm-kernel@lists•infradead.org>
> CC: Dinh Nguyen <dinguyen@opensource•altera.com>
> CC: Chris Ball <chris@printf•net>
> CC: Ulf Hansson <ulf.hansson@linaro•org>
> CC: Jaehoon Chung <jh80.chung@samsung•com>
> CC: Seungwon Jeon <tgih.jun@samsung•com>
> ---
> drivers/mmc/host/dw_mmc.h | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
> index 18c4afe..46efdc5 100644
> --- a/drivers/mmc/host/dw_mmc.h
> +++ b/drivers/mmc/host/dw_mmc.h
> @@ -171,22 +171,22 @@
>
> /* Register access macros */
> #define mci_readl(dev, reg) \
> - __raw_readl((dev)->regs + SDMMC_##reg)
> + readl_relaxed((dev)->regs + SDMMC_##reg)
> #define mci_writel(dev, reg, value) \
> - __raw_writel((value), (dev)->regs + SDMMC_##reg)
> + writel_relaxed((value), (dev)->regs + SDMMC_##reg)
>
> /* 16-bit FIFO access macros */
> #define mci_readw(dev, reg) \
> - __raw_readw((dev)->regs + SDMMC_##reg)
> + readw_relaxed((dev)->regs + SDMMC_##reg)
> #define mci_writew(dev, reg, value) \
> - __raw_writew((value), (dev)->regs + SDMMC_##reg)
> + writew_relaxed((value), (dev)->regs + SDMMC_##reg)
>
> /* 64-bit FIFO access macros */
> #ifdef readq
> #define mci_readq(dev, reg) \
> - __raw_readq((dev)->regs + SDMMC_##reg)
> + readq_relaxed((dev)->regs + SDMMC_##reg)
> #define mci_writeq(dev, reg, value) \
> - __raw_writeq((value), (dev)->regs + SDMMC_##reg)
> + writeq_relaxed((value), (dev)->regs + SDMMC_##reg)
> #else
> /*
> * Dummy readq implementation for architectures that don't define it.
>
next prev parent reply other threads:[~2015-03-30 0:48 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-25 11:27 [RESEND] Altera socfpga big endian work Ben Dooks
2015-03-25 11:27 ` [PATCH RESEND 1/7] ARM: debug: fix big endian operation for 8250 word mode Ben Dooks
2015-03-25 11:27 ` [PATCH RESEND 2/7] ARM: socfpga: enable big endian for secondary core(s) Ben Dooks
2015-03-25 11:27 ` [PATCH RESEND 3/7] ARM: socfpga: support big endian for socfpga Ben Dooks
2015-03-25 11:27 ` [PATCH RESEND 4/7] clocksource: dw_apb_timer_of: make IO endian agnostic Ben Dooks
2015-03-25 11:27 ` [PATCH RESEND 5/7] mmc: host: dw_mmc make IO accessors " Ben Dooks
2015-03-30 0:48 ` Jaehoon Chung [this message]
2015-03-25 11:27 ` [PATCH RESEND 6/7] mmc: host: dw_mmc: change idmac descriptor files to __le32 Ben Dooks
2015-03-25 11:27 ` [PATCH RESEND 7/7] mmc: host: dw_mmc: fix fifo ordering in big endian Ben Dooks
2015-03-31 14:13 ` [RESEND] Altera socfpga big endian work Dinh Nguyen
2015-03-31 15:34 ` Ben Dooks
2015-03-31 17:47 ` Dinh Nguyen
2015-04-01 10:50 ` Ben Dooks
2015-04-01 14:50 ` Dinh Nguyen
2015-04-01 16:01 ` Ben Dooks
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