From: t-kristo@ti•com (Tero Kristo)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCHv3 10/10] CLK: TI: always enable DESHDCP clock
Date: Wed, 20 May 2015 14:47:24 +0300 [thread overview]
Message-ID: <555C744C.6070901@ti.com> (raw)
In-Reply-To: <1430906938-26128-11-git-send-email-tomi.valkeinen@ti.com>
On 05/06/2015 01:08 PM, Tomi Valkeinen wrote:
> DESHDCP clock is needed on DRA7 based SoCs to enable the DSS IP. That
> clock is an odd one, as it is not supposed to be any kind of core clock
> for DSS, and we don't even support HDCP, but the clock is still needed
> even for the HWMOD framework to be able to reset the DSS IP.
>
> As there's no support for multiple core clocks in the HWMOD framework,
> we don't have any obvious place to enable this clock when DSS IP is
> being enabled.
>
> Furthermore, the HDMI on OMAP5 DSS is the same as on DRA7, and OMAP5
> does not have any such clock configuration bit. This suggests that on
> OMAP5 the DESHDCP clock is always enabled, and for DRA7 we have the
> possibility to gate it.
>
> So, as we don't have any clean way to enable and disable the clock
> based on the need, this patch enables the clock at boot time, making it
> work similarly to OMAP5.
>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti•com>
> ---
> drivers/clk/ti/clk-7xx.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
> index 2dd956b9affa..63b8323df918 100644
> --- a/drivers/clk/ti/clk-7xx.c
> +++ b/drivers/clk/ti/clk-7xx.c
> @@ -312,7 +312,7 @@ static struct ti_dt_clk dra7xx_clks[] = {
> int __init dra7xx_dt_clk_init(void)
> {
> int rc;
> - struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck;
> + struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck, *hdcp_ck;
>
> ti_dt_clocks_register(dra7xx_clks);
>
> @@ -348,5 +348,10 @@ int __init dra7xx_dt_clk_init(void)
> if (rc)
> pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
>
> + hdcp_ck = clk_get_sys(NULL, "dss_deshdcp_clk");
> + rc = clk_prepare_enable(hdcp_ck);
> + if (rc)
> + pr_err("%s: failed to set dss_deshdcp_clk\n", __func__);
> +
> return rc;
> }
>
You should rather use the assigned-clock properties in DT to accomplish
this, the manual clock tweaks under the drivers/clk/ti/clk-* files
should be converted to DT setup also.
-Tero
next prev parent reply other threads:[~2015-05-20 11:47 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-06 10:08 [PATCHv3 00/10] ARM: DRA7: add display support Tomi Valkeinen
2015-05-06 10:08 ` [PATCHv3 01/10] arm/dts: dra7xx: add 'ti, set-rate-parent' for dss_dss_clk Tomi Valkeinen
2015-05-06 10:08 ` [PATCHv3 02/10] ARM: DRA7: hwmod: add DMM hwmod description Tomi Valkeinen
2015-05-06 10:08 ` [PATCHv3 03/10] ARM: DRA7: hwmod: set DSS submodule parent hwmods Tomi Valkeinen
2015-05-06 10:08 ` [PATCHv3 04/10] ARM: OMAP: display: change compat names to array Tomi Valkeinen
2015-05-06 10:08 ` [PATCHv3 05/10] ARM: OMAP2+: display: detect DRA7 DSS Tomi Valkeinen
2015-05-06 10:08 ` [PATCHv3 06/10] arm/dts: dra7.dtsi: add DSS support Tomi Valkeinen
2015-05-06 10:08 ` [PATCHv3 07/10] arm/dts: dra72-evm.dts: add HDMI Tomi Valkeinen
2015-05-06 10:08 ` [PATCHv3 08/10] arm/dts: am57xx-beagle-x15.dts: " Tomi Valkeinen
2015-05-06 10:08 ` [PATCHv3 09/10] arm: dra7: add DESHDCP clock Tomi Valkeinen
2015-05-06 10:08 ` [PATCHv3 10/10] CLK: TI: always enable " Tomi Valkeinen
2015-05-20 11:47 ` Tero Kristo [this message]
2015-05-20 11:50 ` Tero Kristo
2015-05-20 19:34 ` Stephen Boyd
2015-05-21 3:06 ` Paul Walmsley
2015-05-22 6:27 ` Tomi Valkeinen
2015-05-28 4:22 ` Michael Turquette
2015-05-28 6:25 ` Tero Kristo
2015-05-28 22:49 ` Stephen Boyd
2015-05-27 9:11 ` Tomi Valkeinen
2015-06-03 16:19 ` Michael Turquette
2015-05-20 8:24 ` [PATCHv3 00/10] ARM: DRA7: add display support Tomi Valkeinen
2015-06-01 5:46 ` Paul Walmsley
2015-06-01 6:21 ` Tomi Valkeinen
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