From: puck.chen@hisilicon•com (chenfeng)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH V2 2/3] Add iommu driver for hi6220 SoC platform
Date: Fri, 23 Oct 2015 17:10:31 +0800 [thread overview]
Message-ID: <5629F987.3060701@hisilicon.com> (raw)
In-Reply-To: <56265783.5040406@arm.com>
Hi Robin,
On 2015/10/20 23:02, Robin Murphy wrote:
> On 20/10/15 09:45, Chen Feng wrote:
>> iommu/hisilicon: Add hi6220-SoC smmu driver
>
>> +
>> +static int hi6220_smmu_attach_dev(struct iommu_domain *domain,
>> + struct device *dev)
>> +{
>> + dev->archdata.iommu = &iova_allocator;
>
> If the hardware doesn't offer any kind of device isolation (i.e. multiple translation contexts), then you should probably have more logic here to ensure only a single domain can ever be active at once.
>
>> + return 0;
>> +}
>> +
I feel confused about your above comments. Could you help explain "ensure only a single domain can ever be active at once"?
> Robin.
>
>
> .
>
next prev parent reply other threads:[~2015-10-23 9:10 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-20 8:45 [PATCH V2 1/3] Documentation for system mmu in hi6220 platform Chen Feng
2015-10-20 8:45 ` [PATCH V2 2/3] Add iommu driver for hi6220 SoC platform Chen Feng
2015-10-20 15:02 ` Robin Murphy
2015-10-21 1:56 ` chenfeng
2015-10-23 9:10 ` chenfeng [this message]
2015-10-20 8:45 ` [PATCH V2 3/3] Add dts node for smmu on hi6220 SoC Chen Feng
2015-10-20 9:00 ` Arnd Bergmann
2015-10-20 10:17 ` chenfeng
2015-10-20 10:34 ` [PATCH V2 1/3] Documentation for system mmu in hi6220 platform Mark Rutland
2015-10-20 12:33 ` chenfeng
2015-10-22 1:15 ` Rob Herring
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