From: mtitinger@baylibre•com (Marc Titinger)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH RFC 18/27] drivers: cpu-pd: Add PM Domain governor for CPUs
Date: Thu, 19 Nov 2015 09:50:30 +0100 [thread overview]
Message-ID: <564D8D56.1080206@baylibre.com> (raw)
In-Reply-To: <20151118184245.GA28755@red-moon>
On 18/11/2015 19:42, Lorenzo Pieralisi wrote:
> On Tue, Nov 17, 2015 at 03:37:42PM -0700, Lina Iyer wrote:
>> A PM domain comprising of CPUs may be powered off when all the CPUs in
>> the domain are powered down. Powering down a CPU domain is generally a
>> expensive operation and therefore the power performance trade offs
>> should be considered. The time between the last CPU powering down and
>> the first CPU powering up in a domain, is the time available for the
>> domain to sleep. Ideally, the sleep time of the domain should fulfill
>> the residency requirement of the domains' idle state.
>>
>> To do this effectively, read the time before the wakeup of the cluster's
>> CPUs and ensure that the domain's idle state sleep time guarantees the
>> QoS requirements of each of the CPU, the PM QoS CPU_DMA_LATENCY and the
>> state's residency.
>
> To me this information should be part of the CPUidle governor (it is
> already there), we should not split the decision into multiple layers.
>
> The problem you are facing is that the CPUidle governor(s) do not take
> cross cpus relationship into account, I do not think that adding another
> decision layer in the power domain subsystem helps, you are doing that
> just because adding it to the existing CPUidle governor(s) is invasive.
>
> Why can't we use the power domain work you put together to eg disable
> idle states that share multiple cpus and make them "visible" only
> when the power domain that encompass them is actually going down ?
>
> You could use the power domains information to detect states that
> are shared between cpus.
>
> It is just an idea, what I am saying is that having another governor in
> the power domain subsytem does not make much sense, you split the
> decision in two layers while there is actually one, the existing
> CPUidle governor and that's where the decision should be taken.
>
> Thoughts appreciated.
Maybe this is silly and not thought-through, but I wonder if the
responsibilities could be split or instance with an outer control loop
that has the heuristic to compute the next tick time, and the required
cpu-power needed during that time slot, and an inner control loop
(genpd) that has a per-domain QoS and can optimize power consumption.
Marc.
>
> Lorenzo
>
>> Signed-off-by: Lina Iyer <lina.iyer@linaro•org>
>> ---
>> drivers/base/power/cpu-pd.c | 83 ++++++++++++++++++++++++++++++++++++++++++++-
>> 1 file changed, 82 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/base/power/cpu-pd.c b/drivers/base/power/cpu-pd.c
>> index 617ce54..a00abc1 100644
>> --- a/drivers/base/power/cpu-pd.c
>> +++ b/drivers/base/power/cpu-pd.c
>> @@ -21,6 +21,7 @@
>> #include <linux/pm_qos.h>
>> #include <linux/rculist.h>
>> #include <linux/slab.h>
>> +#include <linux/tick.h>
>>
>> #define CPU_PD_NAME_MAX 36
>>
>> @@ -66,6 +67,86 @@ static void get_cpus_in_domain(struct generic_pm_domain *genpd,
>> }
>> }
>>
>> +static bool cpu_pd_down_ok(struct dev_pm_domain *pd)
>> +{
>> + struct generic_pm_domain *genpd = pd_to_genpd(pd);
>> + struct cpu_pm_domain *cpu_pd = to_cpu_pd(genpd);
>> + int qos = pm_qos_request(PM_QOS_CPU_DMA_LATENCY);
>> + u64 sleep_ns = ~0;
>> + ktime_t earliest;
>> + int cpu;
>> + int i;
>> +
>> + /* Reset the last set genpd state, default to index 0 */
>> + genpd->state_idx = 0;
>> +
>> + /* We dont want to power down, if QoS is 0 */
>> + if (!qos)
>> + return false;
>> +
>> + /*
>> + * Find the sleep time for the cluster.
>> + * The time between now and the first wake up of any CPU that
>> + * are in this domain hierarchy is the time available for the
>> + * domain to be idle.
>> + */
>> + earliest.tv64 = KTIME_MAX;
>> + for_each_cpu_and(cpu, cpu_pd->cpus, cpu_online_mask) {
>> + struct device *cpu_dev = get_cpu_device(cpu);
>> + struct gpd_timing_data *td;
>> +
>> + td = &dev_gpd_data(cpu_dev)->td;
>> +
>> + if (earliest.tv64 < td->next_wakeup.tv64)
>> + earliest = td->next_wakeup;
>> + }
>> +
>> + sleep_ns = ktime_to_ns(ktime_sub(earliest, ktime_get()));
>> + if (sleep_ns <= 0)
>> + return false;
>> +
>> + /*
>> + * Find the deepest sleep state that satisfies the residency
>> + * requirement and the QoS constraint
>> + */
>> + for (i = genpd->state_count - 1; i > 0; i--) {
>> + u64 state_sleep_ns;
>> +
>> + state_sleep_ns = genpd->states[i].power_off_latency_ns +
>> + genpd->states[i].power_on_latency_ns +
>> + genpd->states[i].residency_ns;
>> +
>> + /*
>> + * If we cant sleep to save power in the state, move on
>> + * to the next lower idle state.
>> + */
>> + if (state_sleep_ns > sleep_ns)
>> + continue;
>> +
>> + /*
>> + * We also dont want to sleep more than we should to
>> + * gaurantee QoS.
>> + */
>> + if (state_sleep_ns < (qos * NSEC_PER_USEC))
>> + break;
>> + }
>> +
>> + if (i >= 0)
>> + genpd->state_idx = i;
>> +
>> + return (i >= 0) ? true : false;
>> +}
>> +
>> +static bool cpu_stop_ok(struct device *dev)
>> +{
>> + return true;
>> +}
>> +
>> +struct dev_power_governor cpu_pd_gov = {
>> + .power_down_ok = cpu_pd_down_ok,
>> + .stop_ok = cpu_stop_ok,
>> +};
>> +
>> static int cpu_pd_power_off(struct generic_pm_domain *genpd)
>> {
>> struct cpu_pm_domain *pd = to_cpu_pd(genpd);
>> @@ -183,7 +264,7 @@ int of_register_cpu_pm_domain(struct device_node *dn,
>>
>> /* Register the CPU genpd */
>> pr_debug("adding %s as CPU PM domain.\n", pd->genpd->name);
>> - ret = of_pm_genpd_init(dn, pd->genpd, &simple_qos_governor, false);
>> + ret = of_pm_genpd_init(dn, pd->genpd, &cpu_pd_gov, false);
>> if (ret) {
>> pr_err("Unable to initialize domain %s\n", dn->full_name);
>> return ret;
>> --
>> 2.1.4
>>
next prev parent reply other threads:[~2015-11-19 8:50 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-17 22:37 [PATCH RFC 00/27] PM/Domains: Cluster idle support for ARM SoCs Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 01/27] PM / Domains: core changes for multiple states Lina Iyer
2015-12-09 13:58 ` Ulf Hansson
2015-12-17 17:58 ` Axel Haslam
2015-12-17 21:19 ` Ulf Hansson
2015-11-17 22:37 ` [PATCH RFC 02/27] PM / Domains: Allow domain power states to be read from DT Lina Iyer
2015-12-10 16:53 ` Ulf Hansson
2015-12-15 10:07 ` Marc Titinger
2015-12-15 22:14 ` Lina Iyer
2015-12-16 21:36 ` Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 03/27] PM / Domain: Add additional state specific param Lina Iyer
2015-11-19 21:33 ` Kevin Hilman
2015-11-17 22:37 ` [PATCH RFC 04/27] PM / Domains: make governor select deepest state Lina Iyer
2015-12-11 9:13 ` Ulf Hansson
2015-11-17 22:37 ` [PATCH RFC 05/27] PM / Domains: remove old power on/off latencies Lina Iyer
2015-11-18 14:57 ` [PATCH] ARM: imx6: pm: declare pm domain latency on power_state struct Lina Iyer
2015-11-23 13:31 ` Lucas Stach
2015-11-23 13:42 ` Lucas Stach
2015-12-04 23:19 ` Lina Iyer
2015-12-11 9:16 ` [PATCH RFC 05/27] PM / Domains: remove old power on/off latencies Ulf Hansson
2015-11-17 22:37 ` [PATCH RFC 06/27] PM / Domains: add debugfs 'states' and 'timings' seq files Lina Iyer
2015-12-11 11:46 ` Ulf Hansson
2015-12-16 11:07 ` Marc Titinger
2015-12-16 12:48 ` Ulf Hansson
2015-12-16 14:12 ` Marc Titinger
2015-11-17 22:37 ` [PATCH RFC 07/27] PM / Domains: Read domain residency from DT Lina Iyer
2015-11-24 20:41 ` Stephen Boyd
2015-12-11 11:54 ` Ulf Hansson
2015-11-17 22:37 ` [PATCH RFC 08/27] PM / Domains: Support IRQ safe PM domains Lina Iyer
2016-01-14 14:42 ` Ulf Hansson
2016-01-14 18:33 ` Lina Iyer
2016-01-15 8:55 ` Ulf Hansson
2016-01-15 16:57 ` Lina Iyer
2016-01-15 22:08 ` Ulf Hansson
2016-01-18 16:58 ` Lina Iyer
2016-01-18 17:00 ` Lina Iyer
2016-01-19 10:01 ` Ulf Hansson
2015-11-17 22:37 ` [PATCH RFC 09/27] PM / Domains: Attempt runtime suspend of IRQ safe parent domain Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 10/27] drivers: power: Introduce PM domains for CPUs/clusters Lina Iyer
2015-11-24 20:52 ` Stephen Boyd
2015-11-17 22:37 ` [PATCH RFC 11/27] drivers: cpu: Define CPU devices as IRQ safe Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 12/27] ARM: cpuidle: remove cpu parameter from the cpuidle_ops suspend hook Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 13/27] ARM: cpuidle: Add runtime PM support for CPU idle Lina Iyer
2015-11-18 8:50 ` Zhaoyang Huang
2015-11-18 14:17 ` Lina Iyer
2015-11-19 22:10 ` Kevin Hilman
2015-11-17 22:37 ` [PATCH RFC 14/27] tick: get next wakeup event for the CPU Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 15/27] PM / Domains: Add next_wakeup to device's timing data Lina Iyer
2015-11-19 22:19 ` Kevin Hilman
2015-11-20 15:58 ` Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 16/27] ARM: cpuidle: Record the next wakeup event of the CPU Lina Iyer
2015-11-19 23:35 ` Kevin Hilman
2015-11-20 16:28 ` Lina Iyer
2015-11-24 18:29 ` Kevin Hilman
2015-11-17 22:37 ` [PATCH RFC 17/27] drivers: cpu-pd: Record CPUs that are part of the domain Lina Iyer
2015-11-24 21:00 ` Stephen Boyd
2015-11-25 14:13 ` Lina Iyer
2015-11-25 19:12 ` Stephen Boyd
2015-11-25 20:20 ` Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 18/27] drivers: cpu-pd: Add PM Domain governor for CPUs Lina Iyer
2015-11-18 18:42 ` Lorenzo Pieralisi
2015-11-19 8:50 ` Marc Titinger [this message]
2015-11-20 17:39 ` Lina Iyer
2015-11-19 23:52 ` Kevin Hilman
2015-11-20 16:21 ` Lorenzo Pieralisi
2015-11-20 16:42 ` Lina Iyer
2015-11-20 0:03 ` Kevin Hilman
2015-11-17 22:37 ` [PATCH RFC 19/27] drivers: cpu-pd: Invoke CPU PM runtime on hotplug Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 20/27] Documentation: ARM: topology: 'cluster' property for cluster nodes Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 21/27] drivers: cpu-pd: Parse topology to setup CPU PM domains Lina Iyer
2015-12-07 14:54 ` Lorenzo Pieralisi
2015-12-08 18:05 ` Lina Iyer
2015-12-10 18:11 ` Lorenzo Pieralisi
2015-12-11 9:04 ` Geert Uytterhoeven
2015-12-11 20:51 ` Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 22/27] drivers: firmware: PSCI: Export psci_has_ext_power_state() Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 23/27] ARM64: psci: Support cluster idle states for OS-Initated Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 24/27] arm64: dts: Add Qualcomm MSM8916, MTP8916, APQ8016, SBC8016 ids Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 25/27] devicetree: bindings: Document qcom, msm-id and qcom, board-id Lina Iyer
2015-11-19 14:36 ` Rob Herring
2015-11-19 15:36 ` [PATCH RFC 25/27] devicetree: bindings: Document qcom, msm-id and qcom,board-id Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 26/27] ARM64: dts: Add PSCI cpuidle support for MSM8916 Lina Iyer
2015-11-17 22:37 ` [PATCH RFC 27/27] ARM64: dts: Define CPU power domain " Lina Iyer
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