From: marc.zyngier@arm•com (Marc Zyngier)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v6 02/21] KVM: ARM64: Define PMU data structure for each vcpu
Date: Tue, 08 Dec 2015 13:37:14 +0000 [thread overview]
Message-ID: <5666DD0A.5060004@arm.com> (raw)
In-Reply-To: <1449578860-15808-3-git-send-email-zhaoshenglong@huawei.com>
On 08/12/15 12:47, Shannon Zhao wrote:
> From: Shannon Zhao <shannon.zhao@linaro•org>
>
> Here we plan to support virtual PMU for guest by full software
> emulation, so define some basic structs and functions preparing for
> futher steps. Define struct kvm_pmc for performance monitor counter and
> struct kvm_pmu for performance monitor unit for each vcpu. According to
> ARMv8 spec, the PMU contains at most 32(ARMV8_MAX_COUNTERS) counters.
>
> Since this only supports ARM64 (or PMUv3), add a separate config symbol
> for it.
>
> Signed-off-by: Shannon Zhao <shannon.zhao@linaro•org>
> ---
> arch/arm64/include/asm/kvm_host.h | 2 ++
> arch/arm64/kvm/Kconfig | 8 ++++++++
> include/kvm/arm_pmu.h | 40 +++++++++++++++++++++++++++++++++++++++
> 3 files changed, 50 insertions(+)
> create mode 100644 include/kvm/arm_pmu.h
>
> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> index a35ce72..42e15bb 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -37,6 +37,7 @@
>
> #include <kvm/arm_vgic.h>
> #include <kvm/arm_arch_timer.h>
> +#include <kvm/arm_pmu.h>
>
> #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
>
> @@ -132,6 +133,7 @@ struct kvm_vcpu_arch {
> /* VGIC state */
> struct vgic_cpu vgic_cpu;
> struct arch_timer_cpu timer_cpu;
> + struct kvm_pmu pmu;
>
> /*
> * Anything that is not used directly from assembly code goes
> diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig
> index a5272c0..66da9a2 100644
> --- a/arch/arm64/kvm/Kconfig
> +++ b/arch/arm64/kvm/Kconfig
> @@ -36,6 +36,7 @@ config KVM
> select HAVE_KVM_EVENTFD
> select HAVE_KVM_IRQFD
> select KVM_ARM_VGIC_V3
> + select KVM_ARM_PMU
What if HW_PERF_EVENTS is not selected? Also, selecting HW_PERF_EVENTS
is not enough, and you probably need PERF_EVENTS as well, So this should
probably read:
select KVM_ARM_PMU if (HW_PERF_EVENTS && PERF_EVENTS)
> ---help---
> Support hosting virtualized guest machines.
> We don't support KVM with 16K page tables yet, due to the multiple
> @@ -48,6 +49,13 @@ config KVM_ARM_HOST
> ---help---
> Provides host support for ARM processors.
>
> +config KVM_ARM_PMU
> + bool
> + depends on KVM_ARM_HOST && HW_PERF_EVENTS
and this line should be dropped.
> + ---help---
> + Adds support for a virtual Performance Monitoring Unit (PMU) in
> + virtual machines.
> +
> source drivers/vhost/Kconfig
>
> endif # VIRTUALIZATION
> diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h
> new file mode 100644
> index 0000000..dea78f8
> --- /dev/null
> +++ b/include/kvm/arm_pmu.h
> @@ -0,0 +1,40 @@
> +/*
> + * Copyright (C) 2015 Linaro Ltd.
> + * Author: Shannon Zhao <shannon.zhao@linaro•org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#ifndef __ASM_ARM_KVM_PMU_H
> +#define __ASM_ARM_KVM_PMU_H
> +
> +#include <linux/perf_event.h>
> +#ifdef CONFIG_KVM_ARM_PMU
> +#include <asm/pmu.h>
> +#endif
> +
> +struct kvm_pmc {
> + u8 idx;/* index into the pmu->pmc array */
> + struct perf_event *perf_event;
> + u64 bitmask;
> +};
> +
> +struct kvm_pmu {
> +#ifdef CONFIG_KVM_ARM_PMU
> + /* PMU IRQ Number per VCPU */
> + int irq_num;
> + struct kvm_pmc pmc[ARMV8_MAX_COUNTERS];
> +#endif
> +};
> +
> +#endif
>
The repetition of #ifdef CONFIG_KVM_ARM_PMU is a bit ugly. How about
something like this instead:
#ifndef __ASM_ARM_KVM_PMU_H
#define __ASM_ARM_KVM_PMU_H
#ifdef CONFIG_KVM_ARM_PMU
#include <linux/perf_event.h>
#include <asm/pmu.h>
struct kvm_pmc {
u8 idx;/* index into the pmu->pmc array */
struct perf_event *perf_event;
u64 bitmask;
};
struct kvm_pmu {
/* PMU IRQ Number per VCPU */
int irq_num;
struct kvm_pmc pmc[ARMV8_MAX_COUNTERS];
};
#else
struct kvm_pmu {
};
#endif
#endif
and you can then populate the rest of the function prototype and stubs
where needed.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2015-12-08 13:37 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-08 12:47 [PATCH v6 00/21] KVM: ARM64: Add guest PMU support Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 01/21] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 02/21] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao
2015-12-08 13:37 ` Marc Zyngier [this message]
2015-12-08 13:53 ` Will Deacon
2015-12-08 14:10 ` Marc Zyngier
2015-12-08 14:14 ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 03/21] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 04/21] KVM: ARM64: Add reset and access handlers for PMCR_EL0 register Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 05/21] KVM: ARM64: Add reset and access handlers for PMSELR register Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 06/21] KVM: ARM64: Add reset and access handlers for PMCEID0 and PMCEID1 register Shannon Zhao
2015-12-08 14:23 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 07/21] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao
2015-12-08 15:43 ` Marc Zyngier
2015-12-09 7:38 ` Shannon Zhao
2015-12-09 8:23 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 08/21] KVM: ARM64: Add access handler for PMEVTYPERn and PMCCFILTR register Shannon Zhao
2015-12-08 16:17 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 09/21] KVM: ARM64: Add access handler for PMXEVTYPER register Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 10/21] KVM: ARM64: Add access handler for PMEVCNTRn and PMCCNTR register Shannon Zhao
2015-12-08 16:30 ` Marc Zyngier
2015-12-10 11:36 ` Shannon Zhao
2015-12-10 12:07 ` Marc Zyngier
2015-12-10 13:23 ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 11/21] KVM: ARM64: Add access handler for PMXEVCNTR register Shannon Zhao
2015-12-08 16:33 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 12/21] KVM: ARM64: Add reset and access handlers for PMCNTENSET and PMCNTENCLR register Shannon Zhao
2015-12-08 16:42 ` Marc Zyngier
2015-12-09 8:35 ` Shannon Zhao
2015-12-09 8:56 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 13/21] KVM: ARM64: Add reset and access handlers for PMINTENSET and PMINTENCLR register Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 14/21] KVM: ARM64: Add reset and access handlers for PMOVSSET and PMOVSCLR register Shannon Zhao
2015-12-08 16:59 ` Marc Zyngier
2015-12-09 8:47 ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 15/21] KVM: ARM64: Add reset and access handlers for PMUSERENR register Shannon Zhao
2015-12-08 17:03 ` Marc Zyngier
2015-12-09 9:18 ` Shannon Zhao
2015-12-09 9:49 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 16/21] KVM: ARM64: Add reset and access handlers for PMSWINC register Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 17/21] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao
2015-12-08 17:36 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 18/21] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao
2015-12-08 17:37 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 19/21] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 20/21] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 21/21] KVM: ARM64: Add a new kvm ARM PMU device Shannon Zhao
2015-12-08 17:43 ` Marc Zyngier
2015-12-08 17:56 ` [PATCH v6 00/21] KVM: ARM64: Add guest PMU support Marc Zyngier
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