Subject: [PATCH v2] arm: irq: l2c: do not print error in case of missing l2c from dtb

From: [email-masked] (Krzysztof Kozlowski)
Date: Tue, 12 Jan 2016 17:28:55 +0900

On 12.01.2016 16:24, Andi Shyti wrote:
> In some architectures the L2 cache controller is integrated in the
> processor's block itself and it doesn't use any external cache
> controller. This means that an entry in the board's dtb related
> to the l2c is not necessary.
> 
> Distinguish between error codes and print just an information in
> case of -ENODEV.
> 
> This patch converts the following error message:
> 
>    L2C: failed to init: -19
> 
> to the following info:
> 
>    L2C: no controller entry found in the dtb
> 
> on boards like odroid-xu4, cortex A7/A15, which don't have
> external cache controller.
> 
> Signed-off-by: Andi Shyti <[email-masked]>
> Reported-by: Krzysztof Kozlowski <[email-masked]>
> ---
> 
> Thanks Joe,
> 
> makes sense!
> 
> Andi
> 
>  arch/arm/kernel/irq.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)

Works (Odroid XU3, Exynos5422) and looks good for me:

Tested-by: Krzysztof Kozlowski <[email-masked]>
Reviewed-by: Krzysztof Kozlowski <[email-masked]>

Best regards,
Krzysztof