From: akshay.bhat@timesys•com (Akshay Bhat)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v4 3/3] ARM: imx6: Fix procedure to switch the parent of LDB_DI_CLK
Date: Tue, 1 Mar 2016 16:41:36 -0500 [thread overview]
Message-ID: <56D60C90.7080703@timesys.com> (raw)
In-Reply-To: <1456476714-11351-4-git-send-email-p.zabel@pengutronix.de>
Hi Philipp,
On 02/26/2016 03:51 AM, Philipp Zabel wrote:
> From: Fabio Estevam <fabio.estevam@freescale•com>
>
<snip>
> +static void init_ldb_clks(struct device_node *np, void __iomem *ccm_base)
> +{
> + unsigned int reg;
> + unsigned int sel[2][4];
> + int i;
> +
> + reg = readl_relaxed(ccm_base + CCM_CS2CDR);
> + sel[0][0] = (reg >> CS2CDR_LDB_DI0_CLK_SEL_SHIFT) & 7;
> + sel[1][0] = (reg >> CS2CDR_LDB_DI1_CLK_SEL_SHIFT) & 7;
> +
> + sel[0][3] = sel[0][2] = sel[0][1] = sel[0][0];
> + sel[1][3] = sel[1][2] = sel[1][1] = sel[1][0];
> +
> + of_assigned_ldb_sels(np, &sel[0][3], &sel[1][3]);
> +
> + for (i = 0; i < 2; i++) {
> + /* Warn if a glitch might have been introduced already */
> + if (sel[i][0] != 3) {
> + pr_warn("ccm: ldb_di%d_sel already changed from reset value: %d\n",
> + i, sel[i][0]);
> + }
> +
> + if (sel[i][0] == sel[i][3])
> + continue;
> +
> + /* Only switch to or from pll2_pfd2_396m if it is disabled */
> + if ((sel[i][0] == 2 || sel[i][3] == 2) &&
> + (clk_get_parent(clk[IMX6QDL_CLK_PERIPH_PRE]) ==
> + clk[IMX6QDL_CLK_PLL2_PFD2_396M])) {
> + pr_err("ccm: ldb_di%d_sel: couldn't disable pll2_pfd2_396m\n",
> + i);
> + sel[i][3] = sel[i][2] = sel[i][1] = sel[i][0];
> + continue;
> + }
> +
> + /*
> + * It is unclear whether the procedure works for switching from
> + * pll3_usb_otg to any other parent than pll5_video_div
> + */
> + if (sel[i][0] > 3 && sel[i][0] != (sel[i][3] | 4)) {
> + pr_err("ccm: ldb_di%d_sel workaround only for top mux\n",
> + i);
> + sel[i][3] = sel[i][2] = sel[i][1] = sel[i][0];
> + continue;
> + }
EB821 doesn't mention the above restriction. My understanding was as
long as the clock source you are switching from/to is disabled it should
be ok to do so. Maybe someone from Freescale can comment?
> +
> + /* First switch to the bottom mux */
> + sel[i][1] = sel[i][0] | 4;
> +
Not sure if this really matters but as per EB821 Section 4.2, 6 b, the
recommended setting for sel[i][1] is 7
> + /* Then configure the top mux before switching back to it */
> + sel[i][2] = sel[i][3] | 4;
> +
Same goes here, as per EB821, Section 4.2, 6 c, the recommended setting
for sel[i][2] is 4
Thanks,
Akshay
next prev parent reply other threads:[~2016-03-01 21:41 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-26 8:51 [PATCH v4 0/3] i.MX6 LDB mux/divider glitch workaround Philipp Zabel
2016-02-26 8:51 ` [PATCH v4 1/3] ARM: imx6: Mask mmdc_ch1 handshake for periph2_sel and mmdc_ch1_axi_podf Philipp Zabel
2016-02-26 8:51 ` [PATCH v4 2/3] ARM: imx6: Make the LDB_DI0 and LDB_DI1 clocks read-only Philipp Zabel
2016-02-26 8:51 ` [PATCH v4 3/3] ARM: imx6: Fix procedure to switch the parent of LDB_DI_CLK Philipp Zabel
2016-03-01 21:41 ` Akshay Bhat [this message]
2016-03-23 15:48 ` Akshay Bhat
2016-03-28 18:53 ` Fabio Estevam
2016-03-28 19:26 ` Akshay Bhat
2016-03-28 19:33 ` Fabio Estevam
2016-03-30 16:18 ` Philipp Zabel
2016-04-05 0:21 ` Fabio Estevam
2016-07-08 21:21 ` Akshay Bhat
2016-07-11 11:14 ` Philipp Zabel
2016-03-28 18:48 ` Fabio Estevam
2016-03-30 16:12 ` Philipp Zabel
2016-03-30 16:02 ` Philipp Zabel
2016-04-12 23:28 ` Fabio Estevam
2016-07-11 11:13 ` Philipp Zabel
2016-04-13 14:48 ` Akshay Bhat
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