From: marc.zyngier@arm•com (Marc Zyngier)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH V2 5/9] arm64: exception: handle instruction abort at current EL
Date: Wed, 6 Apr 2016 16:36:46 +0100 [thread overview]
Message-ID: <57052D0E.5070903@arm.com> (raw)
In-Reply-To: <1459955578-24602-6-git-send-email-tbaicar@codeaurora.org>
On 06/04/16 16:12, Tyler Baicar wrote:
> Add a handler for instruction aborts at the current EL
> (ESR_ELx_EC_IABT_CUR) so they are no longer handled in el1_inv.
> This allows firmware first handling for possible SEA
> (Synchronous External Abort) caused instruction abort at
> current EL.
>
> Signed-off-by: Tyler Baicar <tbaicar@codeaurora•org>
> Signed-off-by: Naveen Kaje <nkaje@codeaurora•org>
> ---
> arch/arm64/kernel/entry.S | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
> index 12e8d2b..f257856 100644
> --- a/arch/arm64/kernel/entry.S
> +++ b/arch/arm64/kernel/entry.S
> @@ -336,6 +336,8 @@ el1_sync:
> lsr x24, x1, #ESR_ELx_EC_SHIFT // exception class
> cmp x24, #ESR_ELx_EC_DABT_CUR // data abort in EL1
> b.eq el1_da
> + cmp x24, #ESR_ELx_EC_IABT_CUR // instruction abort in EL1
> + b.eq el1_ia
> cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
> b.eq el1_undef
> cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception
> @@ -363,6 +365,23 @@ el1_da:
> // disable interrupts before pulling preserved data off the stack
> disable_irq
> kernel_exit 1
> +el1_ia:
> + /*
> + * Instruction abort handling
> + */
> + mrs x0, far_el1
> + enable_dbg
> + // re-enable interrupts if they were enabled in the aborted context
> + tbnz x23, #7, 1f // PSR_I_BIT
> + enable_irq
> +1:
> + orr x1, x1, #1 << 24 // use reserved ISS bit for instruction aborts
> + mov x2, sp // struct pt_regs
> + bl do_mem_abort
> +
> + // disable interrupts before pulling preserved data off the stack
> + disable_irq
> + kernel_exit 1
> el1_sp_pc:
> /*
> * Stack or PC alignment exception handling
>
What happens if you were running at EL2 when this faults gets injected?
It looks like KVM needs something similar, doesn't it?
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2016-04-06 15:36 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-06 15:12 [PATCH V2 0/9] Add UEFI 2.6 and ACPI 6.1 updates for RAS on ARM64 Tyler Baicar
2016-04-06 15:12 ` [PATCH V2 1/9] acpi: apei: read ack upon ghes record consumption Tyler Baicar
2016-04-06 15:53 ` Suzuki K Poulose
2016-04-06 20:43 ` Baicar, Tyler
2016-04-06 15:12 ` [PATCH V2 2/9] ras: acpi/apei: cper: generic error data entry v3 per ACPI 6.1 Tyler Baicar
2016-04-14 10:22 ` Suzuki K Poulose
2016-04-20 21:25 ` Baicar, Tyler
2016-04-06 15:12 ` [PATCH V2 3/9] efi: parse ARMv8 processor error Tyler Baicar
2016-04-06 15:12 ` [PATCH V2 4/9] arm64: exception: handle Synchronous External Abort Tyler Baicar
2016-04-06 15:12 ` [PATCH V2 5/9] arm64: exception: handle instruction abort at current EL Tyler Baicar
2016-04-06 15:36 ` Marc Zyngier [this message]
2016-04-06 21:36 ` Baicar, Tyler
2016-04-07 7:54 ` Marc Zyngier
2016-04-11 22:57 ` Abdulhamid, Harb
2016-04-12 14:17 ` Marc Zyngier
2016-04-06 15:12 ` [PATCH V2 6/9] acpi: apei: handle SEA notification type for ARMv8 Tyler Baicar
2016-04-20 21:38 ` Baicar, Tyler
2016-04-06 15:12 ` [PATCH V2 7/9] acpi: apei: panic OS with fatal error status block Tyler Baicar
2016-04-06 15:12 ` [PATCH V2 8/9] efi: print unrecognized CPER section Tyler Baicar
2016-04-06 15:12 ` [PATCH V2 9/9] ras: acpi / apei: generate trace event for " Tyler Baicar
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