From: Suzuki.Poulose@arm•com (Suzuki K Poulose)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode mutually exclusive
Date: Tue, 26 Apr 2016 10:23:20 +0100 [thread overview]
Message-ID: <571F3388.8090700@arm.com> (raw)
In-Reply-To: <CANLsYkwbme0FcYOAp5McyXxh-rQ77jCS0WhyAOr1pqdtdaSBFA@mail.gmail.com>
On 25/04/16 16:18, Mathieu Poirier wrote:
> On 25 April 2016 at 09:11, Suzuki K Poulose <Suzuki.Poulose@arm•com> wrote:
>> On 25/04/16 16:05, Mathieu Poirier wrote:
>>>
>>> On 25 April 2016 at 08:52, Suzuki K Poulose <Suzuki.Poulose@arm•com>
>>> wrote:
>>>>
>>>> On 25/04/16 15:48, Mathieu Poirier wrote:
>>>>>
>>>>>
>>>>> On 25 April 2016 at 08:32, Suzuki K Poulose <Suzuki.Poulose@arm•com>
>>>>> wrote:
>>>>>>
>>>>>>
>>>>>> On 22/04/16 18:14, Mathieu Poirier wrote:
>>>>
>>>>
>>>>
>>>>>>> + spin_lock_irqsave(&drvdata->spinlock, flags);
>>>>>>> + if (drvdata->reading) {
>>>>>>> + ret = -EINVAL;
>>>>>>> + goto out;
>>>>>>> + }
>>>>>>> +
>>>>>>> + val = local_xchg(&drvdata->mode, mode);
>>>>>>> + /*
>>>>>>> + * In Perf mode there can be only one writer per sink. There
>>>>>>> + * is also no need to continue if the ETR is already operated
>>>>>>> + * from sysFS.
>>>>>>> + */
>>>>>>> + if (val != CS_MODE_DISABLED) {
>>>>>>
>>>>>>
>>>>>>
>>>>>>
>>>>>> Could val be CS_MODE_PERF ? In other words, should we be checking :
>>>>>> if (val == CS_MODE_SYSFS) instead ?
>>>>>
>>>>>
>>>>>
>>>>> If we check for CS_MODE_SYSFS we also have to check for CS_MODE_PERF,
>>>>> which is two checks rather than a single one with the current
>>>>> solution.
>>>>
>>>>
>>>>
>>>> I am confused now. The comment says, we want to check for sysfs mode and
>>>> don't continue in that case. So, we shouldn't be worried about PERF mode.
>>>
>>>
>>> You are correct about the sysFS part, but the first sentence of the
>>> comment also mention that in perf mode there can only be one writer
>>> per sink. Otherwise ring buffers for one session would end up with
>>> traces from other ongoing sessions, and that is not taking into
>>> account the buffer management nightmares it would cause.
>>
>>
>> OK, in either case, val == CS_MODE_SYSFS is much better check there, to
>> what we want to do
>
> If we check for SYSFS we also need to check for PERF. Otherwise
> nothing prevents another session from using the sink buffer, which is
> not supported.
Ah, I got wrong. Sorry for the noise. The current check makes sense.
Suzuki
next prev parent reply other threads:[~2016-04-26 9:23 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-22 17:13 [PATCH V3 00/18] coresight: tmc: make driver usable by Perf Mathieu Poirier
2016-04-22 17:13 ` [PATCH V3 01/18] coresight: tmc: modifying naming convention Mathieu Poirier
2016-04-22 17:13 ` [PATCH V3 02/18] coresight: tmc: waiting for TMCReady bit before programming Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 03/18] coresight: tmc: re-implementing tmc_read_prepare/unprepare() functions Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 04/18] coresight: tmc: clearly define number of transfers per burst Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 05/18] coresight: tmc: introducing new header file Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 06/18] coresight: tmc: cleaning up " Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 07/18] coresight: tmc: splitting driver in ETB/ETF and ETR components Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 08/18] coresight: tmc: making prepare/unprepare functions generic Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 09/18] coresight: tmc: allocating memory when needed Mathieu Poirier
2016-04-25 10:20 ` Suzuki K Poulose
2016-04-25 14:24 ` Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 10/18] coresight: tmc: getting the right read_count on tmc_open() Mathieu Poirier
2016-04-25 10:47 ` Suzuki K Poulose
2016-04-25 14:25 ` Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 11/18] coresight: tmc: adding mode of operation for link/sinks Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 12/18] coresight: tmc: dump system memory content only when needed Mathieu Poirier
2016-04-25 11:16 ` Suzuki K Poulose
2016-04-25 14:38 ` Mathieu Poirier
2016-04-25 14:49 ` Suzuki K Poulose
2016-04-22 17:14 ` [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode mutually exclusive Mathieu Poirier
2016-04-25 14:32 ` Suzuki K Poulose
2016-04-25 14:48 ` Mathieu Poirier
2016-04-25 14:52 ` Suzuki K Poulose
2016-04-25 15:05 ` Mathieu Poirier
2016-04-25 15:11 ` Suzuki K Poulose
2016-04-25 15:18 ` Mathieu Poirier
2016-04-26 9:23 ` Suzuki K Poulose [this message]
2016-04-22 17:14 ` [PATCH V3 14/18] coresight: tmc: keep track of memory width Mathieu Poirier
2016-04-25 14:41 ` Suzuki K Poulose
2016-04-25 14:55 ` Mathieu Poirier
2016-04-25 15:09 ` Suzuki K Poulose
2016-04-25 15:25 ` Mathieu Poirier
2016-04-25 15:28 ` Suzuki K Poulose
2016-04-22 17:14 ` [PATCH V3 15/18] coresight: moving struct cs_buffers to header file Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 16/18] coresight: tmc: implementing TMC-ETF AUX space API Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 17/18] coresight: tmc: implementing TMC-ETR " Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 18/18] coresight: configuring ETF in FIFO mode when acting as link Mathieu Poirier
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