Subject: [PATCH v3] irqchip/gic-v2m: Add workaround for Broadcom NS2 GICv2m erratum

From: [email-masked] (Marc Zyngier)
Date: Thu, 5 May 2016 17:39:37 +0100

On 05/05/16 17:32, Ray Jui wrote:
> Alex Barba <[email-masked]> discovered Broadcom NS2 GICv2m
> implementation has an erratum where the MSI data needs to be the SPI
> number subtracted by an offset of 32, for the correct MSI interrupt
> to be triggered.
> 
> Here we are adding the workaround based on readings from the MSI_IIDR
> register, which contains a value unique to Broadcom NS2 GICv2m
> 
> Reported-by: Alex Barba <[email-masked]>
> Signed-off-by: Ray Jui <[email-masked]>

Acked-by: Marc Zyngier <[email-masked]>

I'll queue that for 4.7.

Thanks,

	M.
-- 
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