From: romain.perier@free-electrons•com (Romain Perier)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 6/7] crypto: marvell: Adding load balancing between engines
Date: Thu, 16 Jun 2016 15:44:40 +0200 [thread overview]
Message-ID: <5762AD48.6020202@free-electrons.com> (raw)
In-Reply-To: <20160615231315.5e254706@bbrezillon>
Hello,
Le 15/06/2016 23:13, Boris Brezillon a ?crit :
> On Wed, 15 Jun 2016 21:15:33 +0200
> Romain Perier <romain.perier@free-electrons•com> wrote:
>
>> This commits adds support for fine grained load balancing on
>> multi-engine IPs. The engine is pre-selected based on its current load
>> and on the weight of the crypto request that is about to be processed.
>> The global crypto queue is also moved to each engine. These changes are
>
> to the mv_cesa_engine object.
>
>> useful for preparing the code to support TDMA chaining between crypto
>> requests, because each tdma chain will be handled per engine.
>
> These changes are required to allow chaining crypto requests at the DMA
> level.
ack
>> diff --git a/drivers/crypto/marvell/cipher.c b/drivers/crypto/marvell/cipher.c
>> index fbaae2f..02aa38f 100644
>> --- a/drivers/crypto/marvell/cipher.c
>> +++ b/drivers/crypto/marvell/cipher.c
>> @@ -89,6 +89,9 @@ static void mv_cesa_ablkcipher_std_step(struct ablkcipher_request *req)
>> size_t len = min_t(size_t, req->nbytes - sreq->offset,
>> CESA_SA_SRAM_PAYLOAD_SIZE);
>>
>> + mv_cesa_adjust_op(engine, &sreq->op);
>> + memcpy_toio(engine->sram, &sreq->op, sizeof(sreq->op));
>> +
>> len = sg_pcopy_to_buffer(req->src, creq->src_nents,
>> engine->sram + CESA_SA_DATA_SRAM_OFFSET,
>> len, sreq->offset);
>> @@ -167,12 +170,9 @@ mv_cesa_ablkcipher_std_prepare(struct ablkcipher_request *req)
>> {
>> struct mv_cesa_ablkcipher_req *creq = ablkcipher_request_ctx(req);
>> struct mv_cesa_ablkcipher_std_req *sreq = &creq->req.std;
>> - struct mv_cesa_engine *engine = sreq->base.engine;
>>
>> sreq->size = 0;
>> sreq->offset = 0;
>> - mv_cesa_adjust_op(engine, &sreq->op);
>> - memcpy_toio(engine->sram, &sreq->op, sizeof(sreq->op));
>
> Are these changes really related to this load balancing support?
> AFAICT, it's something that could have been done earlier, and is not
> dependent on the changes your introducing here, but maybe I'm missing
> something.
Yeah, indeed. I suggest another commit for doing it. What do you think ?
>
>> }
>
> [...]
>
>> static int mv_cesa_ecb_aes_encrypt(struct ablkcipher_request *req)
>> diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c
>> index f7f84cc..5946a69 100644
>> --- a/drivers/crypto/marvell/hash.c
>> +++ b/drivers/crypto/marvell/hash.c
>> @@ -162,6 +162,15 @@ static void mv_cesa_ahash_std_step(struct ahash_request *req)
>> unsigned int new_cache_ptr = 0;
>> u32 frag_mode;
>> size_t len;
>> + unsigned int digsize;
>> + int i;
>> +
>> + mv_cesa_adjust_op(engine, &creq->op_tmpl);
>> + memcpy_toio(engine->sram, &creq->op_tmpl, sizeof(creq->op_tmpl));
>> +
>> + digsize = crypto_ahash_digestsize(crypto_ahash_reqtfm(req));
>> + for (i = 0; i < digsize / 4; i++)
>> + writel_relaxed(creq->state[i], engine->regs + CESA_IVDIG(i));
>>
>> if (creq->cache_ptr)
>> memcpy_toio(engine->sram + CESA_SA_DATA_SRAM_OFFSET,
>> @@ -265,11 +274,8 @@ static void mv_cesa_ahash_std_prepare(struct ahash_request *req)
>> {
>> struct mv_cesa_ahash_req *creq = ahash_request_ctx(req);
>> struct mv_cesa_ahash_std_req *sreq = &creq->req.std;
>> - struct mv_cesa_engine *engine = sreq->base.engine;
>>
>> sreq->offset = 0;
>> - mv_cesa_adjust_op(engine, &creq->op_tmpl);
>> - memcpy_toio(engine->sram, &creq->op_tmpl, sizeof(creq->op_tmpl));
>
> Same as above: it doesn't seem related to the load balancing stuff.
It might be moved into this "separated commit" described above.
Thanks,
Romain
--
Romain Perier, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
next prev parent reply other threads:[~2016-06-16 13:44 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-15 19:15 [PATCH 0/7] Chain crypto requests together at the DMA level Romain Perier
2016-06-15 19:15 ` [PATCH 1/7] crypto: marvell: Add a macro constant for the size of the crypto queue Romain Perier
2016-06-15 19:20 ` Boris Brezillon
2016-06-15 19:15 ` [PATCH 2/7] crypto: marvell: Check engine is not already running when enabling a req Romain Perier
2016-06-15 19:37 ` Boris Brezillon
2016-06-16 8:18 ` Romain Perier
2016-06-15 19:15 ` [PATCH 3/7] crypto: marvell: Copy IV vectors by DMA transfers for acipher requests Romain Perier
2016-06-15 20:07 ` Boris Brezillon
2016-06-16 8:29 ` Romain Perier
2016-06-16 8:32 ` Gregory CLEMENT
2016-06-15 20:48 ` Boris Brezillon
2016-06-15 19:15 ` [PATCH 4/7] crypto: marvell: Moving the tdma chain out of mv_cesa_tdma_req Romain Perier
2016-06-15 20:42 ` Boris Brezillon
2016-06-16 12:02 ` Romain Perier
2016-06-16 12:45 ` Boris Brezillon
2016-06-16 12:57 ` Boris Brezillon
2016-06-15 19:15 ` [PATCH 5/7] crypto: marvell: Adding a complete operation for async requests Romain Perier
2016-06-15 20:55 ` Boris Brezillon
2016-06-16 13:41 ` Romain Perier
2016-06-15 19:15 ` [PATCH 6/7] crypto: marvell: Adding load balancing between engines Romain Perier
2016-06-15 21:13 ` Boris Brezillon
2016-06-16 13:44 ` Romain Perier [this message]
2016-06-15 19:15 ` [PATCH 7/7] crypto: marvell: Add support for chaining crypto requests in TDMA mode Romain Perier
2016-06-15 21:43 ` Boris Brezillon
2016-06-17 9:54 ` Romain Perier
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