From: josephl@nvidia•com (Joseph Lo)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH V2 03/10] Documentation: dt-bindings: firmware: tegra: add bindings of the BPMP
Date: Thu, 7 Jul 2016 14:25:24 +0800 [thread overview]
Message-ID: <577DF5D4.4010008@nvidia.com> (raw)
In-Reply-To: <CAAVeFuJwhQ=L803W7K+e5_VUKrfB2NyCz+WMR91QuvKgmv1ofw@mail.gmail.com>
On 07/06/2016 07:42 PM, Alexandre Courbot wrote:
> On Tue, Jul 5, 2016 at 6:04 PM, Joseph Lo <josephl@nvidia•com> wrote:
>> The BPMP is a specific processor in Tegra chip, which is designed for
>> booting process handling and offloading the power management, clock
>> management, and reset control tasks from the CPU. The binding document
>> defines the resources that would be used by the BPMP firmware driver,
>> which can create the interprocessor communication (IPC) between the CPU
>> and BPMP.
>>
>> Signed-off-by: Joseph Lo <josephl@nvidia•com>
>> ---
>> Changes in V2:
>> - update the message that the BPMP is clock and reset control provider
>> - add tegra186-clock.h and tegra186-reset.h header files
>> - revise the description of the required properties
>> ---
>> .../bindings/firmware/nvidia,tegra186-bpmp.txt | 77 ++
>> include/dt-bindings/clock/tegra186-clock.h | 940 +++++++++++++++++++++
>> include/dt-bindings/reset/tegra186-reset.h | 217 +++++
>> 3 files changed, 1234 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
>> create mode 100644 include/dt-bindings/clock/tegra186-clock.h
>> create mode 100644 include/dt-bindings/reset/tegra186-reset.h
>>
>> diff --git a/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
>> new file mode 100644
>> index 000000000000..4d0b6eba56c5
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
>> @@ -0,0 +1,77 @@
>> +NVIDIA Tegra Boot and Power Management Processor (BPMP)
>> +
>> +The BPMP is a specific processor in Tegra chip, which is designed for
>> +booting process handling and offloading the power management, clock
>> +management, and reset control tasks from the CPU. The binding document
>> +defines the resources that would be used by the BPMP firmware driver,
>> +which can create the interprocessor communication (IPC) between the CPU
>> +and BPMP.
>> +
>> +Required properties:
>> +- name : Should be bpmp
>> +- compatible
>> + Array of strings
>> + One of:
>> + - "nvidia,tegra186-bpmp"
>> +- mboxes : The phandle of mailbox controller and the mailbox specifier.
>> +- shmem : List of the phandle of the TX and RX shared memory area that
>> + the IPC between CPU and BPMP is based on.
>> +- #clock-cells : Should be 1.
>> +- #reset-cells : Should be 1.
>> +
>> +This node is a mailbox consumer. See the following files for details of
>> +the mailbox subsystem, and the specifiers implemented by the relevant
>> +provider(s):
>> +
>> +- Documentation/devicetree/bindings/mailbox/mailbox.txt
>> +- Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt
>> +
>> +This node is a clock and reset provider. See the following files for
>> +general documentation of those features, and the specifiers implemented
>> +by this node:
>> +
>> +- Documentation/devicetree/bindings/clock/clock-bindings.txt
>> +- include/dt-bindings/clock/tegra186-clock.h
>> +- Documentation/devicetree/bindings/reset/reset.txt
>> +- include/dt-bindings/reset/tegra186-reset.h
>> +
>> +The shared memory bindings for BPMP
>> +-----------------------------------
>> +
>> +The shared memory area for the IPC TX and RX between CPU and BPMP are
>> +predefined and work on top of sysram, which is an SRAM inside the chip.
>> +
>> +See "Documentation/devicetree/bindings/sram/sram.txt" for the bindings.
>> +
>> +Example:
>> +
>> +hsp_top0: hsp at 03c00000 {
>> + ...
>> + #mbox-cells = <1>;
>> +};
>> +
>> +sysram at 30000000 {
>> + compatible = "nvidia,tegra186-sysram", "mmio-ram";
>
> Shouldn't the second compatible be "mmio-sram"?
>
> If so, then you have the same typo in tegra186.dtsi as well.
>
Good catch, will fix.
Thanks,
-Joseph
next prev parent reply other threads:[~2016-07-07 6:25 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-05 9:04 [PATCH V2 00/10] arm64: tegra: add BPMP support Joseph Lo
2016-07-05 9:04 ` [PATCH V2 01/10] Documentation: dt-bindings: mailbox: tegra: Add binding for HSP mailbox Joseph Lo
2016-07-06 17:02 ` Stephen Warren
2016-07-07 6:24 ` Joseph Lo
2016-07-07 18:13 ` Sivaram Nair
2016-07-07 18:35 ` Stephen Warren
2016-07-07 18:44 ` Sivaram Nair
2016-07-11 14:14 ` Rob Herring
2016-07-11 16:08 ` Stephen Warren
2016-07-18 23:13 ` Stephen Warren
2016-07-19 7:09 ` Joseph Lo
2016-07-05 9:04 ` [PATCH V2 02/10] mailbox: tegra-hsp: Add HSP(Hardware Synchronization Primitives) driver Joseph Lo
2016-07-06 7:05 ` Alexandre Courbot
2016-07-06 9:06 ` Joseph Lo
2016-07-06 12:23 ` Alexandre Courbot
2016-07-07 6:37 ` Joseph Lo
2016-07-07 21:33 ` Sivaram Nair
2016-07-18 8:58 ` Joseph Lo
2016-07-06 16:50 ` Stephen Warren
2016-07-07 6:49 ` Joseph Lo
2016-07-07 21:10 ` Sivaram Nair
2016-07-18 8:51 ` Joseph Lo
2016-07-05 9:04 ` [PATCH V2 03/10] Documentation: dt-bindings: firmware: tegra: add bindings of the BPMP Joseph Lo
2016-07-06 11:42 ` Alexandre Courbot
2016-07-07 6:25 ` Joseph Lo [this message]
2016-07-06 17:03 ` Stephen Warren
2016-07-07 6:26 ` Joseph Lo
2016-07-11 14:22 ` Rob Herring
2016-07-11 16:05 ` Stephen Warren
2016-07-18 7:44 ` Joseph Lo
2016-07-18 16:18 ` Stephen Warren
2016-07-13 19:41 ` Stephen Warren
2016-07-18 6:42 ` Joseph Lo
2016-07-05 9:04 ` [PATCH V2 04/10] firmware: tegra: add IVC library Joseph Lo
2016-07-07 11:16 ` Alexandre Courbot
2016-07-09 23:45 ` Paul Gortmaker
2016-07-05 9:04 ` [PATCH V2 05/10] firmware: tegra: add BPMP support Joseph Lo
2016-07-06 11:39 ` Alexandre Courbot
2016-07-06 16:39 ` Stephen Warren
2016-07-06 16:47 ` Matt Longnecker
2016-07-07 2:24 ` Alexandre Courbot
2016-07-07 8:17 ` Joseph Lo
2016-07-07 10:18 ` Alexandre Courbot
2016-07-07 19:55 ` Stephen Warren
2016-07-08 20:19 ` Sivaram Nair
2016-07-08 17:55 ` Sivaram Nair
2016-07-05 9:04 ` [PATCH V2 06/10] soc/tegra: Add Tegra186 support Joseph Lo
2016-07-05 9:04 ` [PATCH V2 07/10] arm64: defconfig: Enable Tegra186 SoC Joseph Lo
2016-07-05 9:04 ` [PATCH V2 08/10] arm64: dts: tegra: Add Tegra186 support Joseph Lo
2016-07-05 9:04 ` [PATCH V2 09/10] arm64: dts: tegra: Add NVIDIA Tegra186 P3310 main board support Joseph Lo
2016-07-05 9:04 ` [PATCH V2 10/10] arm64: dts: tegra: Add NVIDIA P2771 " Joseph Lo
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