From: vladimir.murzin@arm•com (Vladimir Murzin)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v4 07/10] ARM: Introduce MPIDR_LEVEL_SHIFT macro
Date: Tue, 13 Sep 2016 11:32:34 +0100 [thread overview]
Message-ID: <57D7D5C2.6020105@arm.com> (raw)
In-Reply-To: <57D7D100.3040908@arm.com>
On 13/09/16 11:12, Marc Zyngier wrote:
> On 13/09/16 10:04, Vladimir Murzin wrote:
>> On 13/09/16 09:38, Christoffer Dall wrote:
>>> On Mon, Sep 12, 2016 at 03:49:21PM +0100, Vladimir Murzin wrote:
>>>> vgic-v3 driver uses architecture specific MPIDR_LEVEL_SHIFT macro to
>>>> encode the affinity in a form compatible with ICC_SGI* registers.
>>>> Unfortunately, that macro is missing on ARM, so let's add it.
>>>>
>>>> Cc: Russell King <rmk+kernel@armlinux•org.uk>
>>>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm•com>
>>>> ---
>>>> arch/arm/include/asm/cputype.h | 1 +
>>>> 1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
>>>> index 1ee94c7..e2d94c1 100644
>>>> --- a/arch/arm/include/asm/cputype.h
>>>> +++ b/arch/arm/include/asm/cputype.h
>>>> @@ -55,6 +55,7 @@
>>>>
>>>> #define MPIDR_LEVEL_BITS 8
>>>> #define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1)
>>>> +#define MPIDR_LEVEL_SHIFT(level) (MPIDR_LEVEL_BITS * level)
>>>>
>>>
>>> I'm not sure I follow the correctness of this completely.
>>>
>>> This is called from vgic_v3_dispatch_sgi, which takes a u64 value, which
>>> may have something in the Aff3 field, which we now shift left 24 bits,
>>> but that is not the Aff3 field of AArch32's MPIDR.
>>>
>>> What is the rationale for this making sense again?
>>
>> IIUC, in such case we construct mpidr which won't match in match_mpidr()
>> with the value we get from kvm_vcpu_get_mpidr_aff() and no SGI will be
>> sent to the guest.
>>
>> Since we get that u64 value from the guest, I'd think it is something
>> wrong is going on in the guest in case Aff3 is non-zero; however, we can
>> hide it by zeroing out SGI Aff3 bits in access_gic_sgi().
>
> I don't think zeroing Aff3 is the right move, as the spec doesn't say
> that Aff3 should be ignored in a write to ICC_SGI1R. On the other hand,
> the spec says (in the context of the target list): "If a bit is 1 and
> the bit does not correspond to a valid target PE, the bit must be
> ignored by the Distributor".
>
> This makes me think that, unless ICC_SGI1R.IMR is set, we should simply
> ignore that SGI because there is no way we can actually deliver it.
>
> Could you cook a small patch that would go on top of this series?
I assume you've meant ICC_SGI1R.IRM, aka broadcast. In this case,
vgic_v3_dispatch_sgi() seems already matches the logic you've described:
- if IRM == 1, send to everyone except self without check for mpidr
- if IRM == 0, send to target iff matched to a valid mpidr
Am I missing something?
Thanks
Vladimir
>
> Thanks,
>
> M.
>
next prev parent reply other threads:[~2016-09-13 10:32 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-12 14:49 [PATCH v4 00/10] ARM: KVM: Support for vgic-v3 Vladimir Murzin
2016-09-12 14:49 ` [PATCH v4 01/10] arm64: KVM: Use static keys for selecting the GIC backend Vladimir Murzin
2016-09-13 8:20 ` Christoffer Dall
2016-09-13 9:11 ` Marc Zyngier
2016-09-13 9:22 ` Christoffer Dall
2016-09-14 15:20 ` Vladimir Murzin
2016-09-14 15:47 ` Marc Zyngier
2016-09-15 9:03 ` Christoffer Dall
2016-09-22 10:01 ` Marc Zyngier
2016-09-12 14:49 ` [PATCH v4 02/10] arm64: KVM: Move GIC accessors to arch_gicv3.h Vladimir Murzin
2016-09-12 14:49 ` [PATCH v4 03/10] arm64: KVM: Move vgic-v3 save/restore to virt/kvm/arm/hyp Vladimir Murzin
2016-09-13 8:51 ` Christoffer Dall
2016-09-12 14:49 ` [PATCH v4 04/10] KVM: arm64: vgic-its: Introduce config option to guard ITS specific code Vladimir Murzin
2016-09-13 8:51 ` Christoffer Dall
2016-09-12 14:49 ` [PATCH v4 05/10] KVM: arm: vgic: Fix compiler warnings when built for 32-bit Vladimir Murzin
2016-09-13 8:51 ` Christoffer Dall
2016-09-22 10:01 ` Marc Zyngier
2016-09-12 14:49 ` [PATCH v4 06/10] KVM: arm: vgic: Support 64-bit data manipulation on 32-bit host systems Vladimir Murzin
2016-09-13 8:51 ` Christoffer Dall
2016-09-22 10:00 ` Marc Zyngier
2016-09-12 14:49 ` [PATCH v4 07/10] ARM: Introduce MPIDR_LEVEL_SHIFT macro Vladimir Murzin
2016-09-13 8:38 ` Christoffer Dall
2016-09-13 9:04 ` Vladimir Murzin
2016-09-13 10:12 ` Marc Zyngier
2016-09-13 10:32 ` Vladimir Murzin [this message]
2016-09-13 10:44 ` Marc Zyngier
2016-09-14 15:21 ` Vladimir Murzin
2016-09-14 15:50 ` Marc Zyngier
2016-09-22 9:59 ` Marc Zyngier
2016-09-12 14:49 ` [PATCH v4 08/10] ARM: Move system register accessors to asm/cp15.h Vladimir Murzin
2016-09-13 8:52 ` Christoffer Dall
2016-09-22 9:59 ` Marc Zyngier
2016-09-12 14:49 ` [PATCH v4 09/10] ARM: gic-v3: Introduce 32-to-64-bit mappings for GICv3 cpu registers Vladimir Murzin
2016-09-13 8:52 ` Christoffer Dall
2016-09-22 9:57 ` Marc Zyngier
2016-09-12 14:49 ` [PATCH v4 10/10] ARM: KVM: Support vgic-v3 Vladimir Murzin
2016-09-13 8:52 ` Christoffer Dall
2016-09-22 9:58 ` Marc Zyngier
2016-09-15 9:13 ` [PATCH v4 00/10] ARM: KVM: Support for vgic-v3 Christoffer Dall
2016-09-15 10:33 ` Vladimir Murzin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=57D7D5C2.6020105@arm.com \
--to=vladimir.murzin@arm$(echo .)com \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox