From: james.morse@arm•com (James Morse)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v4 10/21] arm64: entry.S: move SError handling into a C function for future expansion
Date: Wed, 03 Jan 2018 16:00:55 +0000 [thread overview]
Message-ID: <5A4CFE37.3010002@arm.com> (raw)
In-Reply-To: <b99e7738-f8dd-26bf-a050-f970c2f8d03b@codeaurora.org>
Hi Adam,
On 02/01/18 21:07, Adam Wallis wrote:
> On 10/19/2017 10:57 AM, James Morse wrote:
> [..]
>> kernel_ventry el1_fiq_invalid // FIQ EL1h
>> - kernel_ventry el1_error_invalid // Error EL1h
>> + kernel_ventry el1_error // Error EL1h
>> kernel_ventry el0_sync // Synchronous 64-bit EL0
>> kernel_ventry el0_irq // IRQ 64-bit EL0
>> kernel_ventry el0_fiq_invalid // FIQ 64-bit EL0
>> - kernel_ventry el0_error_invalid // Error 64-bit EL0
>> + kernel_ventry el0_error // Error 64-bit EL0
>>
>> #ifdef CONFIG_COMPAT
>> kernel_ventry el0_sync_compat // Synchronous 32-bit EL0
>> kernel_ventry el0_irq_compat // IRQ 32-bit EL0
>> kernel_ventry el0_fiq_invalid_compat // FIQ 32-bit EL0
>> - kernel_ventry el0_error_invalid_compat // Error 32-bit EL0
>> + kernel_ventry el0_error_compat // Error 32-bit EL0
>> #else
>> kernel_ventry el0_sync_invalid // Synchronous 32-bit EL0
>> kernel_ventry el0_irq_invalid // IRQ 32-bit EL0
>> @@ -455,10 +455,6 @@ ENDPROC(el0_error_invalid)
>> el0_fiq_invalid_compat:
>> inv_entry 0, BAD_FIQ, 32
>> ENDPROC(el0_fiq_invalid_compat)
>> -
>> -el0_error_invalid_compat:
>> - inv_entry 0, BAD_ERROR, 32
>> -ENDPROC(el0_error_invalid_compat)
>> #endif
> Perhaps I missed something quite obvious, but is there any reason to not also
> remove el1_error_invalid, since SError handling now jumps to el1_error?
There is still a caller for el1_error_invalid: depending on SPSel we are in
thread or handler mode, which causes exceptions to use a different entry in the
vectors. The kernel always uses handler mode, all the thread mode entries point
at their '_invalid' versions.
If we take an SError from EL1t, SPsel==0 then it uses vectors+0x180. (just cut
off the top of this diff). The el1_error change above is for EL1h, SPsel==1,
which uses vectors+0x380.
Thanks for taking a look!
James
next prev parent reply other threads:[~2018-01-03 16:00 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-19 14:57 [PATCH v4 00/21] SError rework + RAS&IESB for firmware first support James Morse
2017-10-19 14:57 ` [PATCH v4 01/21] arm64: explicitly mask all exceptions James Morse
2017-10-19 14:57 ` [PATCH v4 02/21] arm64: introduce an order for exceptions James Morse
2017-10-19 14:57 ` [PATCH v4 03/21] arm64: Move the async/fiq helpers to explicitly set process context flags James Morse
2017-10-19 14:57 ` [PATCH v4 04/21] arm64: Mask all exceptions during kernel_exit James Morse
2017-10-19 14:57 ` [PATCH v4 05/21] arm64: entry.S: Remove disable_dbg James Morse
2017-10-19 14:57 ` [PATCH v4 06/21] arm64: entry.S: convert el1_sync James Morse
2017-10-19 14:57 ` [PATCH v4 07/21] arm64: entry.S convert el0_sync James Morse
2017-10-19 14:57 ` [PATCH v4 08/21] arm64: entry.S: convert elX_irq James Morse
2017-10-19 14:57 ` [PATCH v4 09/21] KVM: arm/arm64: mask/unmask daif around VHE guests James Morse
2017-10-30 7:40 ` Christoffer Dall
2017-11-02 12:14 ` James Morse
2017-11-03 12:45 ` Christoffer Dall
2017-11-03 17:19 ` James Morse
2017-11-06 12:42 ` Christoffer Dall
2017-10-19 14:57 ` [PATCH v4 10/21] arm64: entry.S: move SError handling into a C function for future expansion James Morse
2018-01-02 21:07 ` Adam Wallis
2018-01-03 16:00 ` James Morse [this message]
2017-10-19 14:57 ` [PATCH v4 11/21] arm64: cpufeature: Detect CPU RAS Extentions James Morse
2017-10-31 13:14 ` Will Deacon
2017-11-02 12:15 ` James Morse
2017-10-19 14:57 ` [PATCH v4 12/21] arm64: kernel: Survive corrected RAS errors notified by SError James Morse
2017-10-31 13:50 ` Will Deacon
2017-11-02 12:15 ` James Morse
2017-10-19 14:57 ` [PATCH v4 13/21] arm64: cpufeature: Enable IESB on exception entry/return for firmware-first James Morse
2017-10-31 13:56 ` Will Deacon
2017-10-19 14:58 ` [PATCH v4 14/21] arm64: kernel: Prepare for a DISR user James Morse
2017-10-19 14:58 ` [PATCH v4 15/21] KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2 James Morse
2017-10-20 16:44 ` gengdongjiu
2017-10-23 15:26 ` James Morse
2017-10-24 9:53 ` gengdongjiu
2017-10-30 7:59 ` Christoffer Dall
2017-10-30 10:51 ` Christoffer Dall
2017-10-30 15:44 ` James Morse
2017-10-31 5:48 ` Christoffer Dall
2017-10-31 6:34 ` Marc Zyngier
2017-10-19 14:58 ` [PATCH v4 16/21] KVM: arm64: Save/Restore guest DISR_EL1 James Morse
2017-10-31 4:27 ` Marc Zyngier
2017-10-31 5:27 ` Christoffer Dall
2017-10-19 14:58 ` [PATCH v4 17/21] KVM: arm64: Save ESR_EL2 on guest SError James Morse
2017-10-31 4:26 ` Marc Zyngier
2017-10-31 5:47 ` Marc Zyngier
2017-11-01 17:42 ` James Morse
2017-10-19 14:58 ` [PATCH v4 18/21] KVM: arm64: Handle RAS SErrors from EL1 on guest exit James Morse
2017-10-31 5:55 ` Marc Zyngier
2017-10-31 5:56 ` Christoffer Dall
2017-10-19 14:58 ` [PATCH v4 19/21] KVM: arm64: Handle RAS SErrors from EL2 " James Morse
2017-10-27 6:26 ` gengdongjiu
2017-10-27 17:38 ` James Morse
2017-10-31 6:13 ` Marc Zyngier
2017-10-31 6:13 ` Christoffer Dall
2017-10-19 14:58 ` [PATCH v4 20/21] KVM: arm64: Take any host SError before entering the guest James Morse
2017-10-31 6:23 ` Christoffer Dall
2017-10-31 11:43 ` James Morse
2017-11-01 4:55 ` Christoffer Dall
2017-11-02 12:18 ` James Morse
2017-11-03 12:49 ` Christoffer Dall
2017-11-03 16:14 ` James Morse
2017-11-06 12:45 ` Christoffer Dall
2017-10-19 14:58 ` [PATCH v4 21/21] KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA James Morse
2017-10-31 6:32 ` Christoffer Dall
2017-10-31 6:32 ` Marc Zyngier
2017-10-31 6:35 ` [PATCH v4 00/21] SError rework + RAS&IESB for firmware first support Christoffer Dall
2017-10-31 10:08 ` Will Deacon
2017-11-01 15:23 ` James Morse
2017-11-02 8:14 ` Christoffer Dall
2017-11-09 18:14 ` James Morse
2017-11-10 12:03 ` gengdongjiu
2017-11-13 11:29 ` Christoffer Dall
2017-11-13 13:05 ` Peter Maydell
2017-11-20 8:53 ` Christoffer Dall
2017-11-13 16:14 ` Andrew Jones
2017-11-13 17:56 ` Peter Maydell
2017-11-14 16:11 ` James Morse
2017-11-15 9:59 ` gengdongjiu
2017-11-14 16:03 ` James Morse
2017-11-15 9:15 ` gengdongjiu
2017-11-15 18:25 ` James Morse
2017-11-21 11:31 ` gengdongjiu
2017-11-20 8:55 ` Christoffer Dall
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