Subject: RE: [PATCH 5/7] ARM: dts: rtd1195: Introduce r-bus

From: James Tai <[email-masked]>
Date: Mon, 18 Nov 2019 06:53:39 +0000

Hi Andreas,

> 
> Fixed, also further above for the soc node. This now leaves a gap until
> 0x18100000 - is that gap RAM or non-r-bus registers then?
> 
> 		ranges = <0x18000000 0x18000000 0x00070000>,
> 		         <0x18100000 0x18100000 0x01000000>,
> 		         <0x40000000 0x40000000 0xc0000000>;
> 

> Did you also review the other two ranges? The middle one was labeled NOR
> flash somewhere - are start and size correct? The final one depends on the
> maximum RAM size - does RTD1195 allow more than 1 GiB RAM? All
> non-RAM regions should be covered here.
> 
It is reserved for NOR flash. The start and size is correct.
The rtd1195 can support to 2GiB RAM.

> So another question, applicable to all SoCs: This reserved Boot ROM area at
> the start of the address space, here of size 0xa800, is that copied into RAM, or
> is that the actual ROM overlapping RAM? If the latter, we should exclude it
> from /memory@0's reg (making it /memory@a800), and add it to soc's ranges
> here for correctness.
> 
Yes, we should exclude it from /memory@0's reg.

> With the follow-up question: Is it correct that, given the size 0xa800, I have a
> gap between /memreserve/s from 0xa800 to 0xc000, or should we reserve that
> gap by extending the next /memreserve/ or inserting one?

We should reserve memory address from 0x0000 to 0xa800 for the internal ROM.

Regards,
James

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