Subject: Re: STM32MP1 level triggered interrupts

From: Marc Zyngier <[email-masked]>
Date: Fri, 24 Jan 2020 09:24:53 +0000

On 2020-01-24 09:17, Alexandre Torgue wrote:
> On 1/23/20 11:21 PM, Marek Vasut wrote:

[...]

>> But I still wonder, what is the purpose of the EXTImux in that SoC?
>> Shouldn't that permit routing GPIOs directly into GIC SPIs, which 
>> would
>> then permit detecting at least level-high interrupts ?
>> 
> 
> For this SoC, EXTI block detects external line edges and rises a GIC
> SPI interrupt. This EXTi block is mainly used to handle HW events like
> buttons, clocks ... So first issue seems more to be a design issue
> (your design doesn't fit with MP1 datasheet).
> 
> Now, let's find a solution. I'll have a look on your proposition:
> "check the line in EOI callback and retrig".
> 
> Marc, this kind a solution could be acceptable on your side ?

It will depend on the nature of the hack you will have to put in there.
If it is 100% reliable, why not? Anything short of that, probably not.

         M.
-- 
Jazz is not dead. It just smells funny...

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