From: Kevin Hilman <khilman@baylibre•com>
To: Kishon Vijay Abraham I <kishon@ti•com>
Cc: devicetree@vger•kernel.org, Hanjie Lin <hanjie.lin@amlogic•com>,
Victor Wan <victor.wan@amlogic•com>,
Jianxin Pan <jianxin.pan@amlogic•com>,
Neil Armstrong <narmstrong@baylibre•com>,
Stephen Boyd <sboyd@kernel•org>,
Greg Kroah-Hartman <gregkh@linuxfoundation•org>,
Michael Turquette <mturquette@baylibre•com>,
linux-usb@vger•kernel.org, Yue Wang <yue.wang@amlogic•com>,
Martin Blumenstingl <martin.blumenstingl@googlemail•com>,
Liang Yang <liang.yang@amlogic•com>,
Qiufang Dai <qiufang.dai@amlogic•com>,
Xingyu Chen <xingyu.chen@amlogic•com>,
Carlo Caione <carlo@caione•org>,
linux-amlogic@lists•infradead.org,
Jerome Brunet <jbrunet@baylibre•com>,
Rob Herring <robh@kernel•org>,
linux-arm-kernel@lists•infradead.org,
Jian Hu <jian.hu@amlogic•com>
Subject: Re: [PATCH v9 0/3] arm64: meson: Add support for USB on Amlogic A1
Date: Mon, 02 Mar 2020 18:40:34 +0100 [thread overview]
Message-ID: <7hblper6y5.fsf@baylibre.com> (raw)
In-Reply-To: <1581990859-135234-1-git-send-email-hanjie.lin@amlogic.com>
Kishon,
Hanjie Lin <hanjie.lin@amlogic•com> writes:
> This patchset adds support for USB on Amlogic A1 SoCs.
>
> Because of my mistake I fogot to add PHY maintainer(Kishon) to mail list in
> before versions, so I have to send this v8(and lateres) version again(only with dwc3
> bindings and driver patch removed).
>
> This patchset is composed with :
> - bindings of the PHY
> - bindings of the USB Control Glue(already accepted in v7)
> - PHY Driver
> - USB Control Glue driver(already accepted in v7)
> - dts of the PHY and USB Controller
>
> The Amlogic A1 USB Complex is composed of :
> - 1 DWC3 USB controller for USB2 Host functionality
> - 1 USB2 PHY for USB2 Host functionality
>
> The USB Control Glue setups the clocks and the reset about DWC3 USB
> controller, and binds to the USB2 PHY. It also configures the 8bit
> UTMI interfaces for the USB2 PHY, including setting USB2 phy mode.
>
> The USB2 PHY driver initializes the phy analog settings, phy PLL
> setup and phy tuning.
>
> This patchset is based on A1 clock/power domain/reset series at [0].
Gentle reminder ping.
Once you pick up the bindings and driver (patches 1-2) I'll pick up the
DT patch.
Kevin
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prev parent reply other threads:[~2020-03-02 17:40 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-18 1:54 [PATCH v9 0/3] arm64: meson: Add support for USB on Amlogic A1 Hanjie Lin
2020-02-18 1:54 ` [PATCH v9 1/3] dt-bindings: phy: Add Amlogic A1 USB2 PHY Bindings Hanjie Lin
2020-02-18 1:54 ` [PATCH v9 2/3] phy: amlogic: Add Amlogic A1 USB2 PHY Driver Hanjie Lin
2020-02-18 1:54 ` [PATCH v9 3/3] arm64: dts: meson: a1: Enable USB2 PHY and DWC3 controller Hanjie Lin
2020-02-19 14:12 ` Neil Armstrong
2020-03-16 16:23 ` Kevin Hilman
2020-03-17 7:25 ` Hanjie Lin
2020-03-02 17:40 ` Kevin Hilman [this message]
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