Subject: [PATCH 2/4] soc: Mediatek: Add SCPSYS power domain driver

From: [email-masked] (Kevin Hilman)
Date: Tue, 10 Mar 2015 09:00:19 -0700

Sascha Hauer <[email-masked]> writes:

> On Tue, Mar 10, 2015 at 10:41:42AM +0100, Sascha Hauer wrote:
>> > > +	if (data->bus_prot_mask) {
>> > > +		u32 mask = data->bus_prot_mask;
>> > > +		struct regmap *infracfg = scp->infracfg;
>> > > +
>> > > +		regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0);
>> > > +
>> > > +		expired = jiffies + HZ;
>> > > +
>> > > +		while (1) {
>> > > +			u32 val;
>> > > +
>> > > +			ret = regmap_read(infracfg, INFRA_TOPAXI_PROTECTSTA1, &val);
>> > > +			if (ret)
>> > > +				return ret;
>> > > +
>> > > +			if (!(val & mask))
>> > > +				break;
>> > > +
>> > > +			cpu_relax();
>> > > +			if (time_after(jiffies, expired))
>> > > +				return -EIO;
>> > > +		}
>> > > +	}
>> > 
>> > This whole "Clear bus protection bits" part seems like it should be an
>> > API in the infracfg driver.
>> 
>> Ok, can do.
>
> Since the infracfg driver (which is really a clk driver) currently is
> pending for inclusion I don't want to add more patches to it. I decided
> to drop the protection bits for now and come back to this once the
> infracfg driver is merged.

Makes sense to me.  Hopefully by then, we can have a bit more clarity
from the MTK folks also.

Kevin