Subject: [PATCH 2/3] ARM: dts: Update the parent for Audss clocks in Exynos5420

From: [email-masked] (Kevin Hilman)
Date: Wed, 25 Jun 2014 16:21:39 -0700

Doug Anderson <[email-masked]> writes:

> Tushar,
>
> On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera <[email-masked]> wrote:
>> Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux.
>> As per the user manual, it should be CLK_MAU_EPLL.
>>
>> The problem surfaced when the bootloader in Peach-pit board set
>> the EPLL clock as the parent of AUDSS mux. While booting the kernel,
>> we used to get a system hang during late boot if CLK_MAU_EPLL was
>> disabled.
>>
>> Signed-off-by: Tushar Behera <[email-masked]>
>> Signed-off-by: Shaik Ameer Basha <[email-masked]>
>> Reported-by: Kevin Hilman <[email-masked]>
>> ---
>>  arch/arm/boot/dts/exynos5420.dtsi |    2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> I've tested this myself now as well.
>
> Tested-by: Doug Anderson <[email-masked]>

For me, this patch alone (on top of -next) doesn't solve the boot hang.
I still need clk_ignore_unused for a successful boot.

So, this patch might be correct, but it doesn't prevent a boot hang
using a chain-loaded nv_uboot on peach-pi.  There's still another clock
being disabled that causes a hang.

Kevin