From: marc.zyngier@arm•com (Marc Zyngier)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v5 4/6] arm64: Add DTS support for FSL's LS2085A SoC
Date: Sun, 16 Nov 2014 18:39:55 +0000 [thread overview]
Message-ID: <86lhnb7zwk.fsf@arm.com> (raw)
In-Reply-To: <1416048391-7557-5-git-send-email-bhupesh.sharma@freescale.com> (Bhupesh Sharma's message of "Sat, 15 Nov 2014 10:46:29 +0000")
On Sat, Nov 15 2014 at 10:46:29 AM, Bhupesh Sharma <bhupesh.sharma@freescale•com> wrote:
> This patch adds the device tree support for FSL LS2085A SoC
> based on ARMv8 architecture.
>
> Following levels of DTSI/DTS files have been created for the
> LS2085A SoC family:
>
> - fsl-ls2085a.dtsi:
> DTS-Include file for FSL LS2085A SoC.
>
> - fsl-ls2085a-simu.dts:
> DTS file for FSL LS2085a software simulator model.
>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale•com>
> Signed-off-by: Arnab Basu <arnab_basu@rocketmail•com>
> Signed-off-by: Stuart Yoder <stuart.yoder@freescale•com>
> ---
> arch/arm64/boot/dts/fsl-ls2085a-simu.dts | 65 ++++++++++++
> arch/arm64/boot/dts/fsl-ls2085a.dtsi | 163 ++++++++++++++++++++++++++++++
> 2 files changed, 228 insertions(+)
> create mode 100644 arch/arm64/boot/dts/fsl-ls2085a-simu.dts
> create mode 100644 arch/arm64/boot/dts/fsl-ls2085a.dtsi
>
[...]
> diff --git a/arch/arm64/boot/dts/fsl-ls2085a.dtsi
> b/arch/arm64/boot/dts/fsl-ls2085a.dtsi
> new file mode 100644
> index 0000000..5ff3d77
> --- /dev/null
> +++ b/arch/arm64/boot/dts/fsl-ls2085a.dtsi
[...]
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + /*
> + * We expect the enable-method for cpu's to be "psci", but this
> + * is dependent on the SoC FW, which will fill this in.
> + *
> + * Currently supported enable-method is psci v0.2
> + */
> +
> + /* We have 4 clusters having 2 Cortex-A57 cores each */
> + cpu at 0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x0 0x0>;
> + };
> +
[...]
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <1 13 0x1>, /* Physical Secure PPI, edge triggered */
> + <1 14 0x1>, /* Physical Non-Secure PPI, edge triggered */
> + <1 11 0x1>, /* Virtual PPI, edge triggered */
> + <1 10 0x1>; /* Hypervisor PPI, edge triggered */
Are you sure about this "edge triggered"? The A57 TRM suggests otherwise:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0488g/way1382454511590.html
Thanks,
M.
--
Jazz is not dead. It just smells funny.
next prev parent reply other threads:[~2014-11-16 18:39 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-15 10:46 [PATCH v5 0/6] ARM64: Add support for FSL's LS2085A SoC Bhupesh Sharma
2014-11-15 10:46 ` [PATCH v5 1/6] Documentation: DT: Add bindings for FSL NS16550A UART Bhupesh Sharma
2014-11-15 10:46 ` [PATCH v5 2/6] Documentation: DT: Add entry for FSL LS2085A SoC and Simulator model Bhupesh Sharma
2014-11-15 10:46 ` [PATCH v5 3/6] Documentation: DT: Add entry for FSL Management Complex Bhupesh Sharma
2014-11-15 10:46 ` [PATCH v5 4/6] arm64: Add DTS support for FSL's LS2085A SoC Bhupesh Sharma
2014-11-16 18:39 ` Marc Zyngier [this message]
2014-11-15 10:46 ` [PATCH v5 5/6] arm64: dts/Makefile: Add support for FSL's LS2085A simulator model Bhupesh Sharma
2014-11-15 10:46 ` [PATCH v5 6/6] arm64: Add support for FSL's LS2085A SoC in Kconfig and defconfig Bhupesh Sharma
2014-11-15 11:02 ` [PATCH v5 0/6] ARM64: Add support for FSL's LS2085A SoC Arnd Bergmann
2014-11-15 11:06 ` bhupesh.sharma at freescale.com
2014-11-15 11:15 ` Arnd Bergmann
[not found] <BY1PR0301MB13037E20B2B52E612A6EBC0182700@BY1PR0301MB1303.namprd03.prod.outlook.com>
2014-11-26 5:11 ` [PATCH v5 4/6] arm64: Add DTS " bhupesh.sharma at freescale.com
2014-11-26 10:17 ` Marc Zyngier
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