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From: marc.zyngier@arm•com (Marc Zyngier)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v6 03/15] irq: gic: support hip04 gic
Date: Tue, 20 May 2014 10:02:47 +0100	[thread overview]
Message-ID: <871tvo4ybs.fsf@approximate.cambridge.arm.com> (raw)
In-Reply-To: <CAD6h2NSksfsOZOG4mjH2M5037mDp9H3s=12adsYAF00YHfpmzw@mail.gmail.com> (Haojian Zhuang's message of "Tue, 20 May 2014 04:24:08 +0100")

On Tue, May 20 2014 at  4:24:08 am BST, Haojian Zhuang <haojian.zhuang@linaro•org> wrote:
> On 15 May 2014 17:34, Marc Zyngier <marc.zyngier@arm•com> wrote:
>> On 11/05/14 09:05, Haojian Zhuang wrote:
>>>
>>> +static inline bool gic_is_standard(struct gic_chip_data *gic)
>>
>> Please loose all of the inlines. The compiler can do this by itself.
>>
> Since others also agree on inline, I'll keep to use it.
>
>>> -static u8 gic_get_cpumask(struct gic_chip_data *gic)
>>> +static u16 gic_get_cpumask(struct gic_chip_data *gic)
>>>  {
>>>         void __iomem *base = gic_data_dist_base(gic);
>>>         u32 mask, i;
>>>
>>> -       for (i = mask = 0; i < 32; i += 4) {
>>> -               mask = readl_relaxed(base + GIC_DIST_TARGET + i);
>>> -               mask |= mask >> 16;
>>> -               mask |= mask >> 8;
>>> +       /*
>>> +        * ARM GIC uses 8 registers for interrupt 0-31,
>>> +        * HiP04 GIC uses 16 registers for interrupt 0-31.
>>> +        */
>>> +       for (i = mask = 0; i < 32; i += gic_irqs_per_target_reg(gic)) {
>>> +               if (gic_is_standard(gic)) {
>>> +                       mask = readl_relaxed(base + GIC_DIST_TARGET + i);
>>> +                       mask |= mask >> 16;
>>> +                       mask |= mask >> 8;
>>> +               } else {                        /* HiP04 GIC */
>>> +                       mask = readl_relaxed(base + GIC_DIST_TARGET + i * 2);
>>> +                       mask |= mask >> 16;
>>> +               }
>>
>> You have irq_to_target_reg now, and you can rewrite most of this without
>> duplication (see my previous review comment).
>>
>
> At here, the offset from GIC_DIST_TARGET is got directly.
> In irq_to_target_reg(), the parameter is struct irq_data. These two
> cases are different.
>
> How could I reuse the irq_to_target_reg() at here?

By using your imagination, and redefining irq_to_target_reg to this:

static inline u32 irq_to_target_reg(struct gic_chip_data *gic, int irq)
{
       if (!gic_is_standard(gic))
               i *= 2;
       irq &= ~3U;
       return (i + GIC_DIST_TARGET);
}

You could then try modifying the only existing caller, and then rewrite
the above hunk as such:

       for (i = mask = 0; i < 32; i += gic_irqs_per_target_reg(gic)) {
               mask = readl_relaxed(base + irq_to_target_reg(gic, i));
               mask |= mask >> 16;
               if (gic_is_standard(gic))
                       mask |= mask >> 8;
       }

>
>>> @@ -392,10 +452,17 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
>>>          * Set all global interrupts to this CPU only.
>>>          */
>>>         cpumask = gic_get_cpumask(gic);
>>> -       cpumask |= cpumask << 8;
>>> +       if (gic_is_standard(gic))
>>> +               cpumask |= cpumask << 8;
>>>         cpumask |= cpumask << 16;
>>> -       for (i = 32; i < gic_irqs; i += 4)
>>> -               writel_relaxed(cpumask, base + GIC_DIST_TARGET + i * 4 / 4);
>>> +       for (i = 32; i < gic_irqs; i += gic_irqs_per_target_reg(gic)) {
>>> +               if (gic_is_standard(gic))
>>> +                       writel_relaxed(cpumask,
>>> +                                      base + GIC_DIST_TARGET + i / 4 * 4);
>>> +               else
>>> +                       writel_relaxed(cpumask,
>>> +                                      base + GIC_DIST_TARGET + i / 2 * 4);
>>> +       }
>>
>> Same here.
>>
> Same reason that I can't use irq_to_target_reg(). There's no struct
> irq_data at here.

	for (i = mask = 0; i < 32; i += gic_irqs_per_target_reg(gic))
		writel_relaxed(cpumask, base + irq_to_target_reg(gic, i));

You might need to move irq_to_target_reg out of the CONFIG_SMP section
as well.

	M.
-- 
Jazz is not dead. It just smells funny.

  reply	other threads:[~2014-05-20  9:02 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-11  8:05 [PATCH v6 00/15] enable HiP04 SoC Haojian Zhuang
2014-05-11  8:05 ` [PATCH v6 01/15] ARM: debug: add HiP04 debug uart Haojian Zhuang
2014-05-11  8:05 ` [PATCH v6 02/15] irq: gic: use mask field in GICC_IAR Haojian Zhuang
2014-05-19  0:40   ` Jason Cooper
2014-05-11  8:05 ` [PATCH v6 03/15] irq: gic: support hip04 gic Haojian Zhuang
2014-05-15  9:34   ` Marc Zyngier
2014-05-15 11:14     ` Arnd Bergmann
2014-05-15 12:08       ` Christoffer Dall
2014-05-15 12:13         ` Arnd Bergmann
2014-05-15 12:16           ` Christoffer Dall
2014-05-20  3:24     ` Haojian Zhuang
2014-05-20  9:02       ` Marc Zyngier [this message]
2014-05-20  9:35         ` Haojian Zhuang
2014-05-20  9:42           ` Marc Zyngier
2014-05-19  2:05   ` Jason Cooper
2014-05-20  3:35     ` Haojian Zhuang
2014-05-11  8:06 ` [PATCH v6 04/15] ARM: mcpm: support 4 clusters Haojian Zhuang
2014-05-11  8:06 ` [PATCH v6 05/15] ARM: hisi: add ARCH_HISI Haojian Zhuang
2014-05-11  8:06 ` [PATCH v6 06/15] ARM: hisi: enable MCPM implementation Haojian Zhuang
2014-05-13  8:28   ` Dave Martin
2014-05-13  9:46     ` Haojian Zhuang
2014-05-13 11:44   ` [PATCH v7 " Haojian Zhuang
2014-05-13 19:43     ` Nicolas Pitre
2014-05-15  6:23       ` Haojian Zhuang
2014-05-15 20:01         ` Nicolas Pitre
2014-05-20  4:43           ` Haojian Zhuang
2014-05-21 10:02             ` Dave Martin
2014-05-21 13:52             ` Nicolas Pitre
2014-05-11  8:06 ` [PATCH v6 07/15] ARM: hisi: enable HiP04 Haojian Zhuang
2014-05-13 11:45   ` [PATCH v7 " Haojian Zhuang
2014-05-11  8:06 ` [PATCH v6 08/15] document: dt: add the binding on HiP04 Haojian Zhuang
2014-05-11  8:06 ` [PATCH v6 09/15] document: dt: add the binding on HiP04 clock Haojian Zhuang
2014-05-11  8:06 ` [PATCH v6 10/15] ARM: dts: append hip04 dts Haojian Zhuang
2014-05-11  8:06 ` [PATCH v6 11/15] ARM: config: append lpae configuration Haojian Zhuang
2014-05-11  8:06 ` [PATCH v6 12/15] ARM: config: append hip04_defconfig Haojian Zhuang
2014-05-11  8:06 ` [PATCH v6 13/15] ARM: config: select ARCH_HISI in hi3xxx_defconfig Haojian Zhuang
2014-05-11  8:06 ` [PATCH v6 14/15] ARM: hisi: enable erratum 798181 of A15 on HiP04 Haojian Zhuang
2014-05-11  8:06 ` [PATCH v6 15/15] virt: arm: support hip04 gic Haojian Zhuang
2014-05-15  9:42   ` Marc Zyngier
2014-05-15 13:09     ` Haojian Zhuang
2014-05-15 13:26       ` Marc Zyngier
2014-07-01  8:57         ` Haojian Zhuang
2014-05-20 10:51       ` Christoffer Dall
2014-05-14 18:37 ` [PATCH v6 00/15] enable HiP04 SoC Arnd Bergmann
2014-05-15  9:20   ` Haojian Zhuang
2014-05-15  9:31     ` Marc Zyngier
2014-05-16  5:07       ` Jason Cooper
2014-05-16  7:57         ` Marc Zyngier
2014-05-16 13:31           ` Jason Cooper
2014-05-16 19:09           ` Jason Cooper

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