Subject: Re: [virtio-dev] [PATCH v3] Add virtio SCMI device specification

From: Alex Bennée <[email-masked]>
Date: Fri, 27 Mar 2020 17:19:47 +0000

Peter Hilber <[email-masked]> writes:

> This patch proposes a new virtio device for the Arm SCMI protocol.
>
> The device provides a simple transport for the Arm SCMI protocol[1]. The
> *S*ystem *C*ontrol and *M*anagement *I*nterface protocol allows speaking
> to system controllers that allow orchestrating things like power
> management, system state management and sensor access. The SCMI protocol
> is used on SoCs where multiple cores and co-processors need access to
> these resources.
>
> The virtio transport allows making use of this protocol in virtualized
> systems.
>
> [1] https://developer.arm.com/docs/den0056/b
>
> Signed-off-by: Peter Hilber <[email-masked]>
<snip>
> +
> +\subsubsection{Shared Memory Operation}
> +
> +Various SCMI protocols define statistics shared memory regions (for
> +statistics and sensor values).
> +
> +\devicenormative{\paragraph}{Shared Memory Operation}{Device Types / SCMI Device / Device Operation / Shared Memory Operation}
> +
> +If VIRTIO_SCMI_F_SHARED_MEMORY was negotiated, the device MAY implement
> +an SCMI statistics shared memory region using a virtio shared memory
> +region.

AFAICT this is the first usage of shmid in the virtio spec so I have
some questions. The spec says:

  Memory consistency rules vary depending on the region and the device
  and they will be specified as required by each device.

So what are the rules for memory consistency for these regions:

  - are they read-only w.r.t the guest? (maybe this is implicit?)
  - how does the guest know when they have been updated?
  - how goes the guest know it hasn't read a value mid-update?

> +
> +If the device implements a shared memory region, the device MUST assign
> +the corresponding shmid as per the following table:
> +
> +\begin{tabular}{|l|l|}
> +\hline
> +SCMI statistics shared memory region & Virtio shmid \\
> +\hline \hline
> +Power state statistics shared memory region & 1 \\
> +\hline
> +Performance domain statistics shared memory region & 2 \\
> +\hline
> +Sensor Values Shared Memory & 3 \\
> +\hline
> +Reserved for future use & 4 to 0x7F \\
> +\hline
> +Vendor-specific statistics shared memory regions & 0x80 to 0xFF \\
> +\hline
> +Reserved for future use & 0x100 and greater \\
> +\hline
> +\end{tabular}

-- 
Alex Bennée

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