From: khilman@ti•com (Kevin Hilman)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCHv2 17/19] ARM: OMAP4: put cpu1 back to sleep if no wake request
Date: Wed, 16 May 2012 17:31:24 -0700 [thread overview]
Message-ID: <87396z3axv.fsf@ti.com> (raw)
In-Reply-To: <1336990730-26892-18-git-send-email-t-kristo@ti.com> (Tero Kristo's message of "Mon, 14 May 2012 13:18:48 +0300")
Tero Kristo <t-kristo@ti•com> writes:
> If AUX_CORE_BOOT0 does not indicate wakeup request for cpu1, put it back
> to off.
Why is it waking up then? (I know the answer, but will forget. The
changelog serves as my long-term memory.)
> This is needed during wakeup from device off to prevent cpu1
> from being stuck indefinitely in the wakeup loop
Why does it get stuck?
> and also to prevent wakeup problem on GP chips with device off mode.
What wakeup problem?
> Signed-off-by: Tero Kristo <t-kristo@ti•com>
Assembly code should have some comments to aid comprehension.
> ---
> arch/arm/mach-omap2/omap-headsmp.S | 45 ++++++++++++++++++++++++++++++++---
> 1 files changed, 41 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
> index d602555..59c6578 100644
> --- a/arch/arm/mach-omap2/omap-headsmp.S
> +++ b/arch/arm/mach-omap2/omap-headsmp.S
> @@ -17,8 +17,37 @@
>
> #include <linux/linkage.h>
> #include <linux/init.h>
> +#include <mach/omap-secure.h>
> +#include "prcm_mpu44xx.h"
> +
> +#define CPU1_PWRSTCTRL (OMAP4430_PRCM_MPU_BASE + OMAP4430_PRCM_MPU_CPU1_INST + \
> + OMAP4_PM_CPU1_PWRSTCTRL_OFFSET)
>
> __CPUINIT
> +
> +ENTRY(omap_cpu1_off)
> + ldr r12, =CPU1_PWRSTCTRL
> + ldr r0, [r12]
> + and r0, #3
> + cmp r0, #2
> + beq exit_cpu1_off
> +
> + mov r0, #0x3
> + mov r1, #0x0
> + ldr r12, =OMAP4_MON_SCU_PWR_INDEX
Help! no comments.
> + dsb
> + smc #0
The DO_SMC in sleep44xx.S suggests there should be another dsb here.
> + isb
> + dsb
> + dmb
> + wfi
> + nop
> + nop
Shoudln't this use omap_do_wfi?
Kevin
> +exit_cpu1_off:
> + mov pc, lr
> +ENDPROC(omap_cpu1_off)
> +
> /*
> * OMAP4 specific entry point for secondary CPU to jump from ROM
> * code. This routine also provides a holding flag into which
> @@ -27,32 +56,40 @@
> * register AuxCoreBoot0.
> */
> ENTRY(omap_secondary_startup)
> -hold: ldr r12,=0x103
> + ldr r12,=0x103
> dsb
> smc #0 @ read from AuxCoreBoot0
> mov r0, r0, lsr #9
> mrc p15, 0, r4, c0, c0, 5
> and r4, r4, #0x0f
> cmp r0, r4
> - bne hold
> + beq omap_cont_boot
> +
> + bl omap_cpu1_off
> + b omap_secondary_startup
>
> /*
> * we've been released from the wait loop,secondary_stack
> * should now contain the SVC stack for this core
> */
> +omap_cont_boot:
> b secondary_startup
> ENDPROC(omap_secondary_startup)
>
> ENTRY(omap_secondary_startup_4460)
> -hold_2: ldr r12,=0x103
> + ldr r12,=0x103
> dsb
> smc #0 @ read from AuxCoreBoot0
> mov r0, r0, lsr #9
> mrc p15, 0, r4, c0, c0, 5
> and r4, r4, #0x0f
> cmp r0, r4
> - bne hold_2
> + beq omap4460_cont_boot
> +
> + bl omap_cpu1_off
> + b omap_secondary_startup_4460
>
> +omap4460_cont_boot:
> /*
> * GIC distributor control register has changed between
> * CortexA9 r1pX and r2pX. The Control Register secure
next prev parent reply other threads:[~2012-05-17 0:31 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-14 10:18 [PATCHv2 00/19] ARM: OMAP4: device off support Tero Kristo
2012-05-14 10:18 ` [PATCHv2 01/19] ARM: OMAP4: PM: powerdomain: Add HWSAR flag to L3INIT Tero Kristo
2012-05-16 18:27 ` Kevin Hilman
2012-05-14 10:18 ` [PATCHv2 02/19] ARM: OMAP4: Add SAR ROM base address Tero Kristo
2012-05-16 18:28 ` Kevin Hilman
2012-05-21 8:28 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 03/19] ARM: OMAP4: PM: Add device-off support Tero Kristo
2012-05-16 22:36 ` Kevin Hilman
2012-05-17 7:10 ` Shilimkar, Santosh
2012-05-21 8:48 ` Tero Kristo
2012-05-21 14:05 ` Jean Pihet
2012-05-29 18:34 ` Kevin Hilman
2012-05-29 18:31 ` Kevin Hilman
2012-05-30 8:20 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 04/19] ARM: OMAP4: PM: save/restore all DPLL settings in OFF mode Tero Kristo
2012-05-16 22:42 ` Kevin Hilman
2012-05-17 7:04 ` Shilimkar, Santosh
2012-05-17 8:52 ` Shilimkar, Santosh
2012-05-17 16:37 ` Kevin Hilman
2012-05-21 9:01 ` Tero Kristo
2012-05-29 19:46 ` Menon, Nishanth
2012-05-30 17:59 ` Kevin Hilman
2012-05-30 18:24 ` Menon, Nishanth
2012-05-30 22:09 ` Kevin Hilman
2012-05-31 2:38 ` Shilimkar, Santosh
2012-05-21 8:58 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 05/19] ARM: OMAP4: PM: save/restore all CM1/2 " Tero Kristo
2012-05-16 22:48 ` Kevin Hilman
2012-05-17 7:05 ` Shilimkar, Santosh
2012-05-14 10:18 ` [PATCHv2 06/19] ARM: OMAP4: PM: Add SAR backup support towards device OFF Tero Kristo
2012-05-16 22:58 ` Kevin Hilman
2012-05-17 7:02 ` Shilimkar, Santosh
2012-05-17 16:42 ` Kevin Hilman
2012-05-18 5:53 ` Shilimkar, Santosh
2012-05-21 9:07 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 07/19] ARM: OMAP4: Auto generate SAR layout contents Tero Kristo
2012-05-14 10:18 ` [PATCHv2 08/19] ARM: OMAP4: SAR: generate overwrite data based on SAR ROM contents Tero Kristo
2012-05-14 10:18 ` [PATCHv2 09/19] ARM: OMAP4: PM: add errata support Tero Kristo
2012-05-29 20:10 ` Menon, Nishanth
2012-05-30 8:32 ` Tero Kristo
2012-05-30 14:45 ` Menon, Nishanth
2012-05-14 10:18 ` [PATCHv2 10/19] ARM: OMAP4: PM: Work-around for ROM code BUG of IVAHD/TESLA Tero Kristo
2012-05-16 23:05 ` Kevin Hilman
2012-05-16 23:07 ` Kevin Hilman
2012-05-21 9:11 ` Tero Kristo
2012-05-29 20:13 ` Kevin Hilman
2012-05-17 6:52 ` Shilimkar, Santosh
2012-05-17 16:45 ` Kevin Hilman
2012-05-18 5:55 ` Shilimkar, Santosh
2012-05-14 10:18 ` [PATCHv2 11/19] ARM: OMAP4: PM: save/restore CM L3INSTR registers when MPU hits OSWR/OFF mode Tero Kristo
2012-05-16 23:17 ` Kevin Hilman
2012-05-17 6:53 ` Shilimkar, Santosh
2012-05-14 10:18 ` [PATCHv2 12/19] ARM: OMAP4: PM: update ROM return address for OSWR and OFF Tero Kristo
2012-05-16 23:36 ` Kevin Hilman
2012-05-21 9:29 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 13/19] ARM: OMAP4: PM: Mark the PPI and SPI interrupts as non-secure for GP Tero Kristo
2012-05-16 23:48 ` Kevin Hilman
2012-05-21 9:32 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 14/19] ARM: OMAP4: wakeupgen: enable clocks for save_secure_all Tero Kristo
2012-05-17 0:06 ` Kevin Hilman
2012-05-21 9:38 ` Tero Kristo
2012-05-21 9:43 ` Shilimkar, Santosh
2012-05-29 20:15 ` Kevin Hilman
2012-05-29 20:48 ` Menon, Nishanth
2012-05-30 8:44 ` Tero Kristo
2012-05-30 8:33 ` Tero Kristo
2012-05-17 0:17 ` Paul Walmsley
2012-05-21 9:35 ` Tero Kristo
2012-05-21 9:39 ` Shilimkar, Santosh
2012-05-14 10:18 ` [PATCHv2 15/19] ARM: OMAP4430: PM: workaround for DDR corruption on second CS Tero Kristo
2012-05-17 0:15 ` Kevin Hilman
2012-05-17 7:12 ` Shilimkar, Santosh
2012-05-17 16:47 ` Kevin Hilman
2012-05-18 5:55 ` Shilimkar, Santosh
2012-05-14 10:18 ` [PATCHv2 16/19] TEMP: ARM: OMAP4: prevent voltage transitions Tero Kristo
2012-05-14 10:18 ` [PATCHv2 17/19] ARM: OMAP4: put cpu1 back to sleep if no wake request Tero Kristo
2012-05-17 0:31 ` Kevin Hilman [this message]
2012-05-21 10:21 ` Tero Kristo
2012-05-21 10:40 ` Shilimkar, Santosh
2012-05-29 20:17 ` Kevin Hilman
2012-05-30 15:18 ` Menon, Nishanth
2012-05-14 10:18 ` [PATCHv2 18/19] ARM: OMAP4460: wakeupgen: set GIC_CPU0 backup status flag always Tero Kristo
2012-05-17 0:33 ` Kevin Hilman
2012-05-21 9:12 ` Tero Kristo
2012-05-14 10:18 ` [PATCHv2 19/19] ARM: OMAP4: powerdomain: update mpu / core off counters during device off Tero Kristo
2012-05-30 21:08 ` Menon, Nishanth
2012-05-31 6:50 ` Tero Kristo
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