Subject: Re: CP110 Comphy Issue

From: Baruch Siach <[email-masked]>
Date: Sun, 24 Nov 2019 09:31:06 +0200

Hi Sven, Miquel,

On Sun, Nov 24 2019, Sven Auhagen wrote:
> I am testing Kernel 5.4 RC8 with the new CP110 comphy initialization
> and it does not work for our custom board on CP 1 PCIE0.
>
> It hangs on phy up indefinitely during boot.
>
> CP0 PCIE0 works fine.
>
> I am using:
> +&cp1_pcie0 {
> +              pinctrl-names = "default";
> +              pinctrl-0 = <&cp0_pci1_reset_pins>;
> +              num-lanes = <1>;
> +              //num-viewport = <8>;
> +              reset-gpios = <&cp0_gpio2 1 GPIO_ACTIVE_LOW>;
> +              //rx-disable-gpio = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
> +              phys = <&cp1_comphy0 0>;
> +              phy-names = "cp1-pcie0-x1-phy";
> +              status = "okay";
> +};
>
> And this one works
>
> +&cp0_pcie0 {
> +              pinctrl-names = "default";
> +              pinctrl-0 = <&cp0_pci0_reset_pins>;
> +              num-lanes = <1>;
> +              //num-viewport = <8>;
> +              reset-gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
> +              //rx-disable-gpio = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>;
> +              phys = <&cp0_comphy0 0>;
> +              phy-names = "cp0-pcie0-x1-phy";
> +              status = "okay";
> +};
> +
>
> I am using u-boot 2019.04 and ATF 2.1.
> PCIe is initialized by U-Boot.
>
> I was using a ported version of the comphy code from the marvell linux
> github before which did not have this problem.
>
> Let me know if I can debug anything here on my end.

One important bit of missing information is that the board is based on
Armada 8040.

baruch

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