Subject: Re: Excessive TLB flush ranges

From: Thomas Gleixner <[email-masked]>
Date: Tue, 16 May 2023 10:20:37 +0200

On Tue, May 16 2023 at 10:18, Thomas Gleixner wrote:

> On Tue, May 16 2023 at 08:37, Thomas Gleixner wrote:
>> On Mon, May 15 2023 at 22:31, Russell King wrote:
>>>> +	list_for_each_entry(va, list, list) {
>>>> +		/* flush range by one by one 'invlpg' */
>>>> +		for (addr = va->va_start; addr < va->va_end; addr += PAGE_SIZE)
>>>> +			flush_tlb_one_kernel(addr);
>>>
>>> Isn't this just the same as:
>>> 	flush_tlb_kernel_range(va->va_start, va->va_end);
>>
>> Indeed.
>
> Actually not. At least not on x86 where it'd end up with 3 IPIs for that
> case again, instead of having one which walks the list on each CPU.

ARM32 has the same problem when tlb_ops_need_broadcast() is true.

Thanks,

        tglx

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