From: robert.jarzmik@free•fr (Robert Jarzmik)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH] ARM: xscale: correct auxiliary register in suspend/resume
Date: Wed, 19 Nov 2014 19:55:35 +0100 [thread overview]
Message-ID: <87r3wz6mvs.fsf@free.fr> (raw)
In-Reply-To: <1416053153-27491-1-git-send-email-dbaryshkov@gmail.com> (Dmitry Eremin-Solenikov's message of "Sat, 15 Nov 2014 15:05:53 +0300")
Dmitry Eremin-Solenikov <dbaryshkov@gmail•com> writes:
...zip...
Acked-by: Robert Jarzmik <robert.jarzmik@free•fr>
Hi Russell,
Is this patch in [1] fine by you so that Dmitry can submit it to your patch system ?
Cheers.
--
Robert
[1] The patch
---8>---
According to the manuals I have, XScale auxiliary register should be
reached with opc_2 = 1 instead of crn = 1. cpu_xscale_proc_init
correctly uses c1, c0, 1 arguments, but cpu_xscale_do_suspend and
cpu_xscale_do_resume use c1, c1, 0. Correct suspend/resume functions to
also use c1, c0, 1.
The issue was primarily noticed thanks to qemu reporing "unsupported
instruction" on the pxa suspend path. Confirmed in PXA210/250 and PXA255
XScale Core manuals and in PXA270 and PXA320 Developers Guides.
Harware tested by me on tosa (pxa255). Robert confirmed on pxa270 board.
Tested-by: Robert Jarzmik <robert.jarzmik@free•fr>
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail•com>
---
arch/arm/mm/proc-xscale.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 23259f1..afa2b3c 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -535,7 +535,7 @@ ENTRY(cpu_xscale_do_suspend)
mrc p15, 0, r5, c15, c1, 0 @ CP access reg
mrc p15, 0, r6, c13, c0, 0 @ PID
mrc p15, 0, r7, c3, c0, 0 @ domain ID
- mrc p15, 0, r8, c1, c1, 0 @ auxiliary control reg
+ mrc p15, 0, r8, c1, c0, 1 @ auxiliary control reg
mrc p15, 0, r9, c1, c0, 0 @ control reg
bic r4, r4, #2 @ clear frequency change bit
stmia r0, {r4 - r9} @ store cp regs
@@ -552,7 +552,7 @@ ENTRY(cpu_xscale_do_resume)
mcr p15, 0, r6, c13, c0, 0 @ PID
mcr p15, 0, r7, c3, c0, 0 @ domain ID
mcr p15, 0, r1, c2, c0, 0 @ translation table base addr
- mcr p15, 0, r8, c1, c1, 0 @ auxiliary control reg
+ mcr p15, 0, r8, c1, c0, 1 @ auxiliary control reg
mov r0, r9 @ control register
b cpu_resume_mmu
ENDPROC(cpu_xscale_do_resume)
--
Robert
next prev parent reply other threads:[~2014-11-19 18:55 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-15 12:05 [PATCH] ARM: xscale: correct auxiliary register in suspend/resume Dmitry Eremin-Solenikov
2014-11-19 18:55 ` Robert Jarzmik [this message]
2014-11-27 19:00 ` Robert Jarzmik
2014-11-27 19:17 ` Dmitry Eremin-Solenikov
-- strict thread matches above, loose matches on Subject: below --
2014-11-08 20:38 [PATCH] arm: " Dmitry Eremin-Solenikov
2014-11-09 15:23 ` Robert Jarzmik
2014-11-09 16:14 ` Dmitry Eremin-Solenikov
2014-11-09 18:04 ` Robert Jarzmik
2014-11-15 11:52 ` Robert Jarzmik
2014-11-15 12:06 ` Dmitry Eremin-Solenikov
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