Subject: [PATCHv6 1/4] pwm: Add Freescale FTM PWM driver support

From: [email-masked] (Bill Pringlemeir)
Date: Thu, 19 Dec 2013 16:55:57 -0500

On 11 Nov 2013, Li.Xiubo at freescale.com wrote:

> +static int fsl_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
> +			  int duty_ns, int period_ns)
> +{
> +	unsigned long period_cycles, duty_cycles;
> +	unsigned long cntin = FTM_CNTIN_VAL;
> +	struct fsl_pwm_chip *fpc;
> +
> +	fpc = to_fsl_chip(chip);
> +
> +	period_cycles = fsl_rate_to_cycles(fpc, period_ns);
> +	if (period_cycles > 0xFFFF) {
> +		dev_err(chip->dev, "required PWM period cycles(%lu) overflow "
> +				"16-bits counter!\n", period_cycles);
> +		return -EINVAL;
> +	}
> +
> +	duty_cycles = fsl_rate_to_cycles(fpc, duty_ns);
> +	if (duty_cycles >= 0xFFFF) {
> +		dev_err(chip->dev, "required PWM duty cycles(%lu) overflow "
> +				"16-bits counter!\n", duty_cycles);
> +		return -EINVAL;
> +	}
> +
> +	writel(FTMCnSC_MSB | FTMCnSC_ELSB, fpc->base + FTM_CSC(pwm->hwpwm));
> +
> +	writel(0xF0, fpc->base + FTM_OUTMASK);
> +	writel(0x0F, fpc->base + FTM_OUTINIT);
> +	writel(FTM_CNTIN_VAL, fpc->base + FTM_CNTIN);
> +
> +	writel(period_cycles + cntin - 1, fpc->base + FTM_MOD);
> +	writel(duty_cycles + cntin, fpc->base + FTM_CV(pwm->hwpwm));
> +
> +	return 0;
> +}

Even though the module can support eight channels, the FTM_MOD is global
and is updated in each 'config'.  So, if we have two PWMs, and both call
'config' with different periods, the last one to call will win?  There
doesn't seem to be any locking/inspection of 'MOD'.  I think this is
global to the FTM, while 'FTM_CV()' is per channel.

So we may have 8 PWMs, all with the same period, but with different duty
cycles.  Is this correct?  Or are we only supporting one channel per
FTM/PWM?

Thanks,
Bill Pringlemeir.