From: Andrew Lunn <andrew@lunn•ch>
To: Robert Hancock <robert.hancock@calian•com>
Cc: "daniel@iogearbox•net" <daniel@iogearbox•net>,
"radhey.shyam.pandey@xilinx•com" <radhey.shyam.pandey@xilinx•com>,
"michal.simek@xilinx•com" <michal.simek@xilinx•com>,
"kuba@kernel•org" <kuba@kernel•org>,
"linux-arm-kernel@lists•infradead.org"
<linux-arm-kernel@lists•infradead.org>,
"netdev@vger•kernel.org" <netdev@vger•kernel.org>,
"davem@davemloft•net" <davem@davemloft•net>,
"ariane.keller@tik•ee.ethz.ch" <ariane.keller@tik•ee.ethz.ch>
Subject: Re: [PATCH net v2 2/9] net: axienet: Wait for PhyRstCmplt after core reset
Date: Wed, 12 Jan 2022 20:44:58 +0100 [thread overview]
Message-ID: <Yd8vukDquQLHYAXR@lunn.ch> (raw)
In-Reply-To: <d0b00b8c96be17e6ad636f5a74ebfb170a603eac.camel@calian.com>
> > Is this bit guaranteed to be clear before you start waiting for it?
>
> The documentation for the IP core (
> https://www.xilinx.com/content/dam/xilinx/support/documentation/ip_documentation/axi_ethernet/v7_2/pg138-axi-ethernet.pdf
> ) states for the phy_rst_n output signal: "This active-Low reset is held
> active for 10 ms after power is applied and during any reset. After the reset
> goes inactive, the PHY cannot be accessed for an additional 5 ms." The
> PhyRstComplt bit definition mentions "This signal does not transition to 1 for
> 5 ms after PHY_RST_N transitions to 1". Given that a reset of the core has just
> been completed above, the PHY reset should at least have been initiated as
> well, so it should be sufficient to just wait for the bit to become 1 at this
> point.
Great, thanks for checking.
Reviewed-by: Andrew Lunn <andrew@lunn•ch>
Andrew
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists•infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-01-12 19:46 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-12 17:36 [PATCH net v2 0/9] Xilinx axienet fixes Robert Hancock
2022-01-12 17:36 ` [PATCH net v2 1/9] net: axienet: increase reset timeout Robert Hancock
2022-01-12 19:11 ` Andrew Lunn
2022-01-12 17:36 ` [PATCH net v2 2/9] net: axienet: Wait for PhyRstCmplt after core reset Robert Hancock
2022-01-12 19:15 ` Andrew Lunn
2022-01-12 19:25 ` Robert Hancock
2022-01-12 19:44 ` Andrew Lunn [this message]
2022-01-13 11:53 ` Radhey Shyam Pandey
2022-01-13 16:27 ` Robert Hancock
2022-01-12 17:36 ` [PATCH net v2 3/9] net: axienet: reset core on initialization prior to MDIO access Robert Hancock
2022-01-12 19:21 ` Andrew Lunn
2022-01-12 17:36 ` [PATCH net v2 4/9] net: axienet: add missing memory barriers Robert Hancock
2022-01-13 12:09 ` Radhey Shyam Pandey
2022-01-13 16:22 ` Robert Hancock
2022-01-12 17:36 ` [PATCH net v2 5/9] net: axienet: limit minimum TX ring size Robert Hancock
2022-01-12 17:36 ` [PATCH net v2 6/9] net: axienet: Fix TX ring slot available check Robert Hancock
2022-01-12 17:36 ` [PATCH net v2 7/9] net: axienet: fix number of TX ring slots for " Robert Hancock
2022-01-12 17:36 ` [PATCH net v2 8/9] net: axienet: fix for TX busy handling Robert Hancock
2022-01-12 17:37 ` [PATCH net v2 9/9] net: axienet: increase default TX ring size to 128 Robert Hancock
2022-01-18 20:45 ` [PATCH net v2 0/9] Xilinx axienet fixes Robert Hancock
2022-01-18 21:00 ` Jakub Kicinski
2022-01-18 21:04 ` Robert Hancock
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Yd8vukDquQLHYAXR@lunn.ch \
--to=andrew@lunn$(echo .)ch \
--cc=ariane.keller@tik$(echo .)ee.ethz.ch \
--cc=daniel@iogearbox$(echo .)net \
--cc=davem@davemloft$(echo .)net \
--cc=kuba@kernel$(echo .)org \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
--cc=michal.simek@xilinx$(echo .)com \
--cc=netdev@vger$(echo .)kernel.org \
--cc=radhey.shyam.pandey@xilinx$(echo .)com \
--cc=robert.hancock@calian$(echo .)com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox