Subject: Re: net: phy: marvell: network working with generic PHY and not with marvell PHY

From: Andrew Lunn <[email-masked]>
Date: Tue, 4 Jan 2022 15:36:37 +0100

> Forget my other message, using 0x1040 lead to success.

O.K. this is going to be messy :-(

diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 4fcfca4e1702..4bc7a44f613a 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -1227,15 +1227,11 @@ static int m88e1118_config_init(struct phy_device *phydev)
 {
        int err;
 
-       /* Change address */
-       err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
-       if (err < 0)
-               return err;
-
-       /* Enable 1000 Mbit */
-       err = phy_write(phydev, 0x15, 0x1070);
-       if (err < 0)
-               return err;
+       if (phy_interface_is_rgmii(phydev)) {
+               err = m88e1121_config_aneg_rgmii_delays(phydev);
+               if (err < 0)
+                       return err;
+       }
 
        /* Change address */
        err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);

will make the PHY driver respect the delays passed to it. But as
Russell already said, it is likely to break with boards which have
"rgmii" in their DT, which is currently being ignored and rgmii-id
programmed into hardware.

We have been here before, with another PHY driver. We decided to make
the change anyway, and fix broken DT when they were reported. It
caused some pain, but in the end, we avoided having odd DT properties
like:

       phy-mode = 'we-really-do-want-rgmii'

There is one more instance of phy_write(phydev, 0x15, 0x1070) for the
m88e1149. I suggest we leave that one alone, until we have a board
which actually requires it.

One thing i would like to understand is where is the delay actually
getting added? If you need the PHY to not add the delay, it is either
the MAC or the PCB. Can you look at the MAC driver and see if it has
any such configuration registers.

       Andrew

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