From: Catalin Marinas <catalin.marinas@arm•com>
To: Oliver Upton <oliver.upton@linux•dev>
Cc: kvmarm@lists•linux.dev, Marc Zyngier <maz@kernel•org>,
James Morse <james.morse@arm•com>,
Suzuki K Poulose <suzuki.poulose@arm•com>,
Zenghui Yu <yuzenghui@huawei•com>, Will Deacon <will@kernel•org>,
linux-arm-kernel@lists•infradead.org,
Darren Hart <darren@os•amperecomputing.com>,
D Scott Phillips <scott@os•amperecomputing.com>,
stable@vger•kernel.org
Subject: Re: [PATCH 1/3] arm64: errata: Mitigate Ampere1 erratum AC03_CPU_38 at stage-2
Date: Wed, 14 Jun 2023 17:58:50 +0100 [thread overview]
Message-ID: <ZInxyiDsyJRo2K9D@arm.com> (raw)
In-Reply-To: <20230609220104.1836988-2-oliver.upton@linux.dev>
On Fri, Jun 09, 2023 at 10:01:02PM +0000, Oliver Upton wrote:
> AmpereOne has an erratum in its implementation of FEAT_HAFDBS that
> required disabling the feature on the design. This was done by reporting
> the feature as not implemented in the ID register, although the
> corresponding control bits were not actually RES0. This does not align
> well with the requirements of the architecture, which mandates these
> bits be RES0 if HAFDBS isn't implemented.
>
> The kernel's use of stage-1 is unaffected, as the HA and HD bits are
> only set if HAFDBS is detected in the ID register. KVM, on the other
> hand, relies on the RES0 behavior at stage-2 to use the same value for
> VTCR_EL2 on any cpu in the system. Mitigate the non-RES0 behavior by
> leaving VTCR_EL2.HA clear on affected systems.
>
> Cc: stable@vger•kernel.org
> Cc: D Scott Phillips <scott@os•amperecomputing.com>
> Cc: Darren Hart <darren@os•amperecomputing.com>
> Signed-off-by: Oliver Upton <oliver.upton@linux•dev>
For the non-KVM bits in here:
Acked-by: Catalin Marinas <catalin.marinas@arm•com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists•infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-06-14 16:59 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-09 22:01 [PATCH 0/3] KVM: arm64: Work around Ampere1 erratum AC03_CPU_38 Oliver Upton
2023-06-09 22:01 ` [PATCH 1/3] arm64: errata: Mitigate Ampere1 erratum AC03_CPU_38 at stage-2 Oliver Upton
2023-06-14 16:58 ` Catalin Marinas [this message]
2023-06-14 17:15 ` D Scott Phillips
2023-06-09 22:01 ` [PATCH 2/3] KVM: arm64: Refactor HFGxTR configuration into separate helpers Oliver Upton
2023-06-09 22:01 ` [PATCH 3/3] KVM: arm64: Prevent guests from enabling HA/HD on Ampere1 Oliver Upton
2023-06-14 16:57 ` [PATCH 0/3] KVM: arm64: Work around Ampere1 erratum AC03_CPU_38 Catalin Marinas
2023-06-14 23:06 ` Oliver Upton
2023-06-15 8:36 ` Catalin Marinas
2023-06-15 9:51 ` Marc Zyngier
2023-06-20 13:15 ` Oliver Upton
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZInxyiDsyJRo2K9D@arm.com \
--to=catalin.marinas@arm$(echo .)com \
--cc=darren@os$(echo .)amperecomputing.com \
--cc=james.morse@arm$(echo .)com \
--cc=kvmarm@lists$(echo .)linux.dev \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
--cc=maz@kernel$(echo .)org \
--cc=oliver.upton@linux$(echo .)dev \
--cc=scott@os$(echo .)amperecomputing.com \
--cc=stable@vger$(echo .)kernel.org \
--cc=suzuki.poulose@arm$(echo .)com \
--cc=will@kernel$(echo .)org \
--cc=yuzenghui@huawei$(echo .)com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox