Re: [PATCH 2/2] drm/panfrost: Use coherent pagetable walk on Juno

From: Robin Murphy <robin.murphy@arm•com>
To: Steven Price <steven.price@arm•com>,
	robh@kernel•org, tomeu.vizoso@collabora•com,
	sudeep.holla@arm•com
Cc: devicetree@vger•kernel.org, lorenzo.pieralisi@arm•com,
	liviu.dudau@arm•com, linux-arm-kernel@lists•infradead.org,
	dri-devel@lists•freedesktop.org
Subject: Re: [PATCH 2/2] drm/panfrost: Use coherent pagetable walk on Juno
Date: Mon, 30 Sep 2019 18:54:23 +0100	[thread overview]
Message-ID: <ad744dc3-d71f-b5e9-df2d-f01332be1cbb@arm.com> (raw)
In-Reply-To: <167ec566-1936-8a05-83fc-74d20d9fb8bc@arm.com>

On 30/09/2019 17:26, Steven Price wrote:
> On 30/09/2019 16:24, Robin Murphy wrote:
>> Although going full "dma-coherent" ends badly due to GEM objects still
>> being forcibly mapped non-cacheable, we can at least take advantage of
>> Juno's ACE-lite integration to skip cache maintenance for pagetables.
>>
>> CC: Rob Herring <robh@kernel•org>
>> CC: Tomeu Vizoso <tomeu.vizoso@collabora•com>
>> Signed-off-by: Robin Murphy <robin.murphy@arm•com>
>> ---
>>
>> This isn't really meant as a series, I'm just sending it together
>> with patch #1 for context.
>>
>>   drivers/gpu/drm/panfrost/panfrost_mmu.c | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c
>> index bdd990568476..560439f63277 100644
>> --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c
>> +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c
>> @@ -365,6 +365,9 @@ int panfrost_mmu_pgtable_alloc(struct panfrost_file_priv *priv)
>>   		.iommu_dev	= pfdev->dev,
>>   	};
>>   
>> +	if (of_device_is_compatible(pfdev->dev->of_node, "arm,juno-mali"))
>> +		pfdev->mmu->pgtbl_cfg.coherent_walk = true;
> 
> Should be:
> 	mmu->pgtbl_cfg.coherent_walk = true;

Oops, yes, rebase error.

> Also I'm not sure whether we should do this based on a compatible
> string. kbase has a "system-coherency" device-tree flag for it. In
> theory we could end up with a long list of compatibles here...

Right, ideally we'd just infer everything we need from "dma-coherent", 
but to be able to set that without causing fireworks we need the GEM 
mmap implementation to be able to play along too. Maybe this can wait 
until I figure out how to address that at the same time...

And either way, it would probably be better to detect anything 
SoC-specific once at probe and stash it in a feature flag - TBH this 
patch is more of a proof-of-concept than anything.

Thanks,
Robin.

> 
> Steve
> 
>> +
>>   	mmu->pgtbl_ops = alloc_io_pgtable_ops(ARM_MALI_LPAE, &mmu->pgtbl_cfg,
>>   					      priv);
>>   	if (!mmu->pgtbl_ops)
>>
> 

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