From: Itaru Kitayama <itaru.kitayama@fujitsu•com>
To: Wei-Lin Chang <weilin.chang@arm•com>
Cc: linux-kernel@vger•kernel.org, kvm@vger•kernel.org,
linux-kselftest@vger•kernel.org,
linux-arm-kernel@lists•infradead.org, kvmarm@lists•linux.dev,
Paolo Bonzini <pbonzini@redhat•com>,
Shuah Khan <shuah@kernel•org>, Marc Zyngier <maz@kernel•org>,
Oliver Upton <oupton@kernel•org>, Joey Gouly <joey.gouly@arm•com>,
Suzuki K Poulose <suzuki.poulose@arm•com>,
Zenghui Yu <yuzenghui@huawei•com>,
Catalin Marinas <catalin.marinas@arm•com>,
Will Deacon <will@kernel•org>
Subject: Re: [PATCH v3 5/9] KVM: arm64: selftests: Add shadow_stage2 test
Date: Fri, 22 May 2026 11:02:54 +0900 [thread overview]
Message-ID: <ag-5Tgd5WOymIE_p@sm-arm-grace07> (raw)
In-Reply-To: <20260516183003.799058-6-weilin.chang@arm.com>
On Sat, May 16, 2026 at 07:29:59PM +0100, Wei-Lin Chang wrote:
> The shadow_stage2 test is aimed to exercise the shadow page table
> management code in KVM. In this first patch a basic test similar to
> hello_nested is created. Right now it doesn't turn on stage-2 for the
> nested guest (L2) yet, therefore the shadow page table code in KVM will
> only be triggered minimally now.
>
> Signed-off-by: Wei-Lin Chang <weilin.chang@arm•com>
> ---
> tools/testing/selftests/kvm/Makefile.kvm | 1 +
> .../selftests/kvm/arm64/shadow_stage2.c | 128 ++++++++++++++++++
> 2 files changed, 129 insertions(+)
> create mode 100644 tools/testing/selftests/kvm/arm64/shadow_stage2.c
>
> diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selftests/kvm/Makefile.kvm
> index e8c108e0c487..c0fac2ba1339 100644
> --- a/tools/testing/selftests/kvm/Makefile.kvm
> +++ b/tools/testing/selftests/kvm/Makefile.kvm
> @@ -176,6 +176,7 @@ TEST_GEN_PROGS_arm64 += arm64/page_fault_test
> TEST_GEN_PROGS_arm64 += arm64/psci_test
> TEST_GEN_PROGS_arm64 += arm64/sea_to_user
> TEST_GEN_PROGS_arm64 += arm64/set_id_regs
> +TEST_GEN_PROGS_arm64 += arm64/shadow_stage2
> TEST_GEN_PROGS_arm64 += arm64/smccc_filter
> TEST_GEN_PROGS_arm64 += arm64/vcpu_width_config
> TEST_GEN_PROGS_arm64 += arm64/vgic_init
> diff --git a/tools/testing/selftests/kvm/arm64/shadow_stage2.c b/tools/testing/selftests/kvm/arm64/shadow_stage2.c
> new file mode 100644
> index 000000000000..cf76a2b0582d
> --- /dev/null
> +++ b/tools/testing/selftests/kvm/arm64/shadow_stage2.c
> @@ -0,0 +1,128 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * shadow_stage2 - Test correctness of shadow stage 2
> + */
> +
> +#include "nested.h"
> +#include "processor.h"
> +#include "test_util.h"
> +#include "ucall.h"
> +
> +#define XLATE2GPA (0xABCD)
> +#define L2STACKSZ (0x100)
> +
> +#define L2SUCCESS (0x0)
> +#define L2FAILED (0x1)
> +#define L2SYNC (0x2)
> +
> +/*
> + * TPIDR_EL2 is used to store vcpu id, so save and restore it.
> + */
> +static gpa_t ucall_translate_to_gpa(void *gva)
> +{
> + gpa_t gpa;
> + u64 vcpu_id = read_sysreg(tpidr_el2);
> +
> + GUEST_SYNC2(XLATE2GPA, gva);
> +
> + /* get the result from userspace */
> + gpa = read_sysreg(tpidr_el2);
> +
> + write_sysreg(vcpu_id, tpidr_el2);
> +
> + return gpa;
> +}
> +
> +static void l2_guest_code(void)
> +{
> + do_hvc(L2SYNC, 10, 0);
> + do_hvc(L2SYNC, 20, 0);
> + do_hvc(L2SYNC, 30, 0);
> +
> + do_hvc(L2SUCCESS, 0, 0);
> +}
> +
> +static void guest_code(void)
> +{
> + struct vcpu vcpu;
> + struct hyp_data hyp_data;
> + int ret, i = 0;
> + gpa_t l2_pc, l2_stack_top;
> + /* force 16-byte alignment for the stack pointer */
> + u8 l2_stack[L2STACKSZ] __attribute__((aligned(16)));
> +
> + GUEST_ASSERT_EQ(get_current_el(), 2);
> + GUEST_PRINTF("vEL2 entry\n");
> +
> + l2_pc = ucall_translate_to_gpa(l2_guest_code);
> + l2_stack_top = ucall_translate_to_gpa(&l2_stack[L2STACKSZ]);
> +
> + init_vcpu(&vcpu, l2_pc, l2_stack_top);
> + prepare_hyp();
> +
> + while (true) {
> + GUEST_PRINTF("L2 enter\n");
> + ret = run_l2(&vcpu, &hyp_data);
> + GUEST_PRINTF("L2 exit\n");
> + GUEST_ASSERT_EQ(ret, ARM_EXCEPTION_TRAP);
> + GUEST_ASSERT_EQ(ESR_ELx_EC(read_sysreg(esr_el2)), ESR_ELx_EC_HVC64);
> +
> + if (vcpu.context.regs.regs[0] == L2SYNC)
> + GUEST_SYNC3(L2SYNC, i++, vcpu.context.regs.regs[1]);
> + else
> + break;
> + }
> +
> + if (vcpu.context.regs.regs[0] != L2SUCCESS)
> + GUEST_FAIL("L2 failed\n");
> +
> + GUEST_PRINTF("L2 success!\n");
> + GUEST_DONE();
> +}
> +
> +int main(void)
> +{
> + struct kvm_vcpu_init init;
> + struct kvm_vcpu *vcpu;
> + struct kvm_vm *vm;
> + struct ucall uc;
> + gpa_t gpa;
> +
> + TEST_REQUIRE(kvm_check_cap(KVM_CAP_ARM_EL2));
> + vm = vm_create(1);
This assumes the default P40V48 4KB guest creation, so perhaps you'd
want to change this to __vm_create(VM_SHAPE(), 1, 0) so the test runs too on other
16KB and 64KB kernels? I've been testing it with your stage 2 unmapping
optimization series together with this v3 KVM selftest series.
Thanks,
Itaru.
> +
> + kvm_get_default_vcpu_target(vm, &init);
> + init.features[0] |= BIT(KVM_ARM_VCPU_HAS_EL2);
> + vcpu = aarch64_vcpu_add(vm, 0, &init, guest_code);
> + kvm_arch_vm_finalize_vcpus(vm);
> +
> + while (true) {
> + vcpu_run(vcpu);
> +
> + switch (get_ucall(vcpu, &uc)) {
> + case UCALL_SYNC:
> + if (uc.args[0] == XLATE2GPA) {
> + gpa = addr_gva2gpa(vm, (gva_t)uc.args[1]);
> + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TPIDR_EL2), gpa);
> + }
> + if (uc.args[0] == L2SYNC)
> + pr_info("L2SYNC, L1 info: %ld, L2 info: %ld\n", uc.args[1], uc.args[2]);
> + break;
> + case UCALL_PRINTF:
> + pr_info("[L1] %s", uc.buffer);
> + break;
> + case UCALL_DONE:
> + pr_info("DONE!\n");
> + goto end;
> + case UCALL_ABORT:
> + REPORT_GUEST_ASSERT(uc);
> + fallthrough;
> + default:
> + TEST_FAIL("Unhandled ucall: %ld\n", uc.cmd);
> + }
> + }
> +
> +end:
> + kvm_vm_free(vm);
> + return 0;
> +}
> --
> 2.43.0
>
next prev parent reply other threads:[~2026-05-22 2:03 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-16 18:29 [PATCH v3 0/9] KVM: arm64: selftests: Basic nested guest support Wei-Lin Chang
2026-05-16 18:29 ` [PATCH v3 1/9] KVM: arm64: selftests: Add GPR save/restore functions for NV Wei-Lin Chang
2026-05-16 18:29 ` [PATCH v3 2/9] KVM: arm64: selftests: Add helpers for guest hypervisors Wei-Lin Chang
2026-05-16 18:29 ` [PATCH v3 3/9] KVM: arm64: selftests: Add hello_nested basic NV selftest Wei-Lin Chang
2026-05-16 18:29 ` [PATCH v3 4/9] KVM: arm64: selftests: Enhance hello_nested test Wei-Lin Chang
2026-05-16 18:29 ` [PATCH v3 5/9] KVM: arm64: selftests: Add shadow_stage2 test Wei-Lin Chang
2026-05-22 2:02 ` Itaru Kitayama [this message]
2026-05-28 4:59 ` [PATCH] KVM: selftest: arm64: Run shadow_stage2 varying guest modes Itaru Kitayama
2026-05-28 16:02 ` Wei-Lin Chang
2026-05-28 22:14 ` Itaru Kitayama
2026-05-16 18:30 ` [PATCH v3 6/9] KVM: arm64: selftests: shadow_stage2: Allocate L2 stack from dedicated pool Wei-Lin Chang
2026-05-16 18:30 ` [PATCH v3 7/9] KVM: arm64: selftests: shadow_stage2: Check supported stage-2 granule size Wei-Lin Chang
2026-05-16 18:30 ` [PATCH v3 8/9] KVM: arm64: selftests: Add infrastructure for using stage-2 in guest Wei-Lin Chang
2026-05-16 18:30 ` [PATCH v3 9/9] KVM: arm64: selftests: shadow_stage2: Turn on stage-2 translation for the nested guest Wei-Lin Chang
2026-05-19 21:31 ` [PATCH v3 0/9] KVM: arm64: selftests: Basic nested guest support Oliver Upton
2026-05-29 13:38 ` Wei-Lin Chang
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