From: Frank Li <Frank.li@nxp•com>
To: Richard Zhu <hongxing.zhu@nxp•com>
Cc: l.stach@pengutronix•de, lpieralisi@kernel•org,
kwilczynski@kernel•org, mani@kernel•org, robh@kernel•org,
bhelgaas@google•com, s.hauer@pengutronix•de,
kernel@pengutronix•de, festevam@gmail•com,
linux-pci@vger•kernel.org, linux-arm-kernel@lists•infradead.org,
imx@lists•linux.dev, linux-kernel@vger•kernel.org,
stable@vger•kernel.org
Subject: Re: [PATCH v2 2/2] PCI: imx6: Assert ref_clk_en after reference clock stabilizes on i.MX95
Date: Thu, 4 Jun 2026 15:34:38 -0400 [thread overview]
Message-ID: <aiHTTvInYK0uj_G9@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20260518072715.3166514-3-hongxing.zhu@nxp.com>
On Mon, May 18, 2026 at 03:27:15PM +0800, Richard Zhu wrote:
> According to the PHY Databook Common Block Signals section, the
> ref_clk_en signal must remain de-asserted until the reference clock is
> running at the appropriate frequency. Once the clock is stable,
> ref_clk_en can be asserted. For lower power states where the reference
> clock to the PHY is disabled, ref_clk_en should also be de-asserted.
>
> Move the ref_clk_en bit manipulation into imx95_pcie_enable_ref_clk()
> to ensure the reference clock stabilizes before ref_clk_en is asserted
> and before the PHY reset is de-asserted. This aligns with the timing
> requirements specified in the PHY documentation.
>
> Fixes: d8574ce57d76 ("PCI: imx6: Add external reference clock input mode support")
> Cc: <stable@vger•kernel.org>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp•com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp•com>
> drivers/pci/controller/dwc/pci-imx6.c | 28 +++++++++++++++++++++------
> 1 file changed, 22 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 66e760015c92..c4b079c93648 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -270,8 +270,6 @@ static int imx95_pcie_init_pre_reset(struct imx_pcie *imx_pcie)
>
> static int imx95_pcie_init_phy(struct imx_pcie *imx_pcie)
> {
> - bool ext = imx_pcie->enable_ext_refclk;
> -
> /*
> * ERR051624: The Controller Without Vaux Cannot Exit L23 Ready
> * Through Beacon or PERST# De-assertion
> @@ -290,10 +288,6 @@ static int imx95_pcie_init_phy(struct imx_pcie *imx_pcie)
> IMX95_PCIE_PHY_CR_PARA_SEL,
> IMX95_PCIE_PHY_CR_PARA_SEL);
>
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_SS_RW_REG_0,
> - IMX95_PCIE_REF_CLKEN,
> - ext ? 0 : IMX95_PCIE_REF_CLKEN);
> -
> return 0;
> }
>
> @@ -742,7 +736,29 @@ static void imx95_pcie_clkreq_override(struct imx_pcie *imx_pcie, bool enable)
>
> static int imx95_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable)
> {
> + bool ext = imx_pcie->enable_ext_refclk;
> +
> imx95_pcie_clkreq_override(imx_pcie, enable);
> + /*
> + * The ref_clk_en signal must remain de-asserted until the
> + * reference clock is running at appropriate frequency, at which
> + * point this bit can be asserted. For lower power states where
> + * the reference clock to the PHY is disabled, it may also be
> + * de-asserted.
> + * +------------------- -+--------+----------------+
> + * | External clock mode | Enable | PCIE_REF_CLKEN |
> + * +---------------------+--------+----------------+
> + * | TRUE | X | 1b'0 |
> + * +---------------------+--------+----------------+
> + * | FALSE | TRUE | 1b'1 |
> + * +---------------------+--------+----------------+
> + * | FALSE | FALSE | 1b'0 |
> + * +---------------------+--------+----------------+
> + */
> + regmap_update_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_SS_RW_REG_0,
> + IMX95_PCIE_REF_CLKEN,
> + ext || !enable ? 0 : IMX95_PCIE_REF_CLKEN);
> +
> return 0;
> }
>
> --
> 2.37.1
>
prev parent reply other threads:[~2026-06-04 19:35 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-18 7:27 [PATCH v2 0/2] PCI: imx6: Fix i.MX95 PCIe PHY initialization sequence Richard Zhu
2026-05-18 7:27 ` [PATCH v2 1/2] PCI: imx6: Configure REF_USE_PAD before PHY reset for i.MX95 Richard Zhu
2026-05-18 7:27 ` [PATCH v2 2/2] PCI: imx6: Assert ref_clk_en after reference clock stabilizes on i.MX95 Richard Zhu
2026-06-04 19:34 ` Frank Li [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aiHTTvInYK0uj_G9@lizhi-Precision-Tower-5810 \
--to=frank.li@nxp$(echo .)com \
--cc=bhelgaas@google$(echo .)com \
--cc=festevam@gmail$(echo .)com \
--cc=hongxing.zhu@nxp$(echo .)com \
--cc=imx@lists$(echo .)linux.dev \
--cc=kernel@pengutronix$(echo .)de \
--cc=kwilczynski@kernel$(echo .)org \
--cc=l.stach@pengutronix$(echo .)de \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
--cc=linux-kernel@vger$(echo .)kernel.org \
--cc=linux-pci@vger$(echo .)kernel.org \
--cc=lpieralisi@kernel$(echo .)org \
--cc=mani@kernel$(echo .)org \
--cc=robh@kernel$(echo .)org \
--cc=s.hauer@pengutronix$(echo .)de \
--cc=stable@vger$(echo .)kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox