From: "Arnd Bergmann" <arnd@arndb•de>
To: "Michal Simek" <monstr@monstr•eu>, "SoC Team" <soc@kernel•org>
Cc: linux-arm <linux-arm-kernel@lists•infradead.org>
Subject: Re: [GIT PULL] arm64: AMD/Xilinx SOC changes for v7.2
Date: Mon, 01 Jun 2026 22:39:36 +0200 [thread overview]
Message-ID: <b56b09af-cd0a-4061-8cce-5e8a50033b4f@app.fastmail.com> (raw)
In-Reply-To: <CAHTX3dKWE6DOPLXPq31wRiXfjac0TVqSOAOLP8itHoGYpF9eBA@mail.gmail.com>
On Fri, May 29, 2026, at 12:15, Michal Simek wrote:
> ----------------------------------------------------------------
> arm64: Xilinx SOC changes for 7.2
>
> firmware:
> - Add CSU register discovery with sysfs interface
I looked at the contents here, and I'm not too fond of adding
low-level register access interfaces to firmware drivers,
that is usually a bad idea because it ties the interface
to a particular platform.
I have no idea what 'CSU registers' are and the ABI
description does not really explain that either.
What type of userspace would access those, and why can't
this be done in a portable way?
> zynqmp_power:
> - Fix race condition in event registration
> - Fix shutdown and free rx mailbox channel
No objections here, though they look like bugfixes that
may be 7.1 material. Up to you, but don't be shy about
sending things as bugfixes when they address real
problems, it's better than waiting for the merge window
and then immediately asking for a backport.
Arnd
next prev parent reply other threads:[~2026-06-01 20:40 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-29 10:15 [GIT PULL] arm64: AMD/Xilinx SOC changes for v7.2 Michal Simek
2026-06-01 20:39 ` Arnd Bergmann [this message]
2026-06-02 12:29 ` Michal Simek
2026-06-02 13:00 ` Arnd Bergmann
2026-06-02 13:45 ` Michal Simek
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