Subject: Re: ARM64_SW_TTBR0_PAN enabled causing hangs on OcteonTX

From: Marc Zyngier <[email-masked]>
Date: Tue, 25 Feb 2020 00:50:15 +0000

Tim,

On 2020-02-25 00:35, Tim Harvey wrote:
> Greetings,
> 
> I'm trying to understand why enabling CONFIG_ARM64_SW_TTBR0_PAN on an
> OcteonTX (CN80XX) SoC would cause the kernel to hang.
> 
> Here's what I'm seeing using arch/arm64/defconfig +
> CONFIG_ARM64_SW_TTBR0_PAN=y on a Gateworks Newport board with a
> CN8030-1500BG676-SCP-P12-G SoC using the Marvell SDK-10.1.1.0 boot
> firmware:
> 
> Starting kernel ...
> 
> [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x430f0a22]
> [    0.000000] Linux version 5.5.0-00001-g2028a3b (tharvey@tharvey)
> (gcc version 7.3.0 (Marvell Inc. Version: Marvell GCC7 build 238.0))
> #2 SMP PREEMPT Mon Feb 24 16:20:24 PST 2020
> [    0.000000] Machine model: Gateworks Newport CN80XX GW6404
> [    0.000000] efi: Getting EFI parameters from FDT:
> [    0.000000] efi: UEFI not found.
> [    0.000000] cma: Reserved 64 MiB at 0x000000007c000000
> [    0.000000] NUMA: NODE_DATA [mem 0x7bbe5100-0x7bbe6fff]
> [    0.000000] Zone ranges:
> [    0.000000]   DMA      [mem 0x0000000000500000-0x000000003fffffff]
> [    0.000000]   DMA32    [mem 0x0000000040000000-0x000000007fffffff]
> [    0.000000]   Normal   empty
> [    0.000000] Movable zone start for each node
> [    0.000000] Early memory node ranges
> [    0.000000]   node   0: [mem 0x0000000000500000-0x000000007fffffff]
> [    0.000000] Initmem setup node 0 [mem 
> 0x0000000000500000-0x000000007fffffff]
> [    0.000000] On node 0 totalpages: 523008
> [    0.000000]   DMA zone: 4076 pages used for memmap
> [    0.000000]   DMA zone: 0 pages reserved
> [    0.000000]   DMA zone: 260864 pages, LIFO batch:63
> [    0.000000]   DMA32 zone: 4096 pages used for memmap
> [    0.000000]   DMA32 zone: 262144 pages, LIFO batch:63
> [    0.000000] psci: probing for conduit method from DT.
> [    0.000000] psci: PSCIv1.1 detected in firmware.
> [    0.000000] psci: Using standard PSCI v0.2 function IDs
> [    0.000000] psci: Trusted OS resident on physical CPU 0x0
> [    0.000000] psci: SMC Calling Convention v1.1
> [    0.000000] percpu: Embedded 22 pages/cpu s53016 r8192 d28904 u90112
> [    0.000000] pcpu-alloc: s53016 r8192 d28904 u90112 alloc=22*4096
> [    0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3
> [    0.000000] Detected VIPT I-cache on CPU0
> [    0.000000] CPU features: detected: GIC system register CPU 
> interface
> [    0.000000] CPU features: detected: Cavium erratum 30115
> [    0.000000] CPU features: detected: Kernel page table isolation 
> (KPTI)

If this CPU is just another version of TX1, KPTI shouldn't get enabled 
on
this HW, as it definitely breaks (see erratum 27456 and its 
consequences).
Can you please enable CONFIG_CAVIUM_ERRATUM_27456 and report back?

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...

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