Subject: Re: [PATCH] arm64: arch_timer: Ensure timer is enabled before using istatus

From: Marc Zyngier <[email-masked]>
Date: Fri, 24 Jul 2020 11:22:18 +0100

On 2020-07-24 10:47, Shaokun Zhang wrote:
> From: Nianyao Tang <[email-masked]>
> 
> In Arm ARM spec, there is a description for timer control register, 
> when
> the value of the ENABLE bit is 0, the ISTATUS field is UNKNOWN. We 
> shall
> only read and use ISTATUS when ENABLE is 1, otherwise ISTATUS may be
> invalid.
> 
> Cc: Mark Rutland <[email-masked]>
> Cc: Marc Zyngier <[email-masked]>
> Cc: Daniel Lezcano <[email-masked]>
> Signed-off-by: Nianyao Tang <[email-masked]>
> Signed-off-by: Shaokun Zhang <[email-masked]>
> ---
>  drivers/clocksource/arm_arch_timer.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clocksource/arm_arch_timer.c
> b/drivers/clocksource/arm_arch_timer.c
> index 6c3e84180146..0bbc2715de79 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -641,7 +641,8 @@ static __always_inline irqreturn_t
> timer_handler(const int access,
>  	unsigned long ctrl;
> 
>  	ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, evt);
> -	if (ctrl & ARCH_TIMER_CTRL_IT_STAT) {
> +	if ((ctrl & ARCH_TIMER_CTRL_ENABLE) &&
> +		(ctrl & ARCH_TIMER_CTRL_IT_STAT)) {
>  		ctrl |= ARCH_TIMER_CTRL_IT_MASK;
>  		arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, evt);
>  		evt->event_handler(evt);

Interesting. A question for you though:

How do you think we made it in the interrupt handler if the timer
was disabled?

         M.
-- 
Jazz is not dead. It just smells funny...

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