Subject: [PATCH 1/7] clk: gxbb: expose USB clocks

From: [email-masked] (Kevin Hilman)
Date: Thu, 08 Sep 2016 12:24:44 -0700

Stephen Boyd <[email-masked]> writes:

> On 09/04, Martin Blumenstingl wrote:
>> USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
>> dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
>> Expose these clocks to DT and comment out in clk driver.
>> 
>> Signed-off-by: Jerome Brunet <[email-masked]>
>> Signed-off-by: Martin Blumenstingl <[email-masked]>
>> ---
>
> Assuming authorship is resolved:
>
> Acked-by: Stephen Boyd <[email-masked]>

After some clarification from Jerome (Martin is the primary author),
I've applied this, with the SoB order swapped.

Kevin