Subject: Re: [PATCH] clk: imx: Use do_div in SCCG due to 64-bit divisor

From: Stephen Rothwell <[email-masked]>
Date: Fri, 30 Nov 2018 13:17:53 +1100

Hi Abel,

On Thu, 29 Nov 2018 23:50:22 +0000 Abel Vesa <[email-masked]> wrote:
>
> --- a/drivers/clk/imx/clk-frac-pll.c
> +++ b/drivers/clk/imx/clk-frac-pll.c
> @@ -116,12 +116,13 @@ static long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate,
>  			       unsigned long *prate)
>  {
>  	u64 parent_rate = *prate;
> -	u32 divff, divfi;
> -	u64 temp64;
> +	u64 divff, divfi;
> +	u64 temp64 = rate;
>  
>  	parent_rate *= 8;
>  	rate *= 2;
> -	divfi = rate / parent_rate;
> +	do_div(temp64, parent_rate);
> +	divfi = temp64;

Did you mean to lose the doubling of "rate" above?

-- 
Cheers,
Stephen Rothwell