Subject: linux-next: manual merge of the usb tree with the rockchip tree

From: Stephen Rothwell <[email-masked]>
Date: Wed, 25 Oct 2023 14:33:26 +1100

Hi all,

Today's linux-next merge of the usb tree got a conflict in:

  arch/arm64/boot/dts/rockchip/rk3588s.dtsi

between commit:

  5a6976b1040a ("arm64: dts: rockchip: Add DFI to rk3588s")

from the rockchip tree and commit:

  bbd3778da16b ("arm64: dts: rockchip: rk3588s: Add USB3 host controller")

from the usb tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 2993e1255042,8b4c99b49798..000000000000
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@@ -443,11 -443,27 +443,32 @@@
  		status = "disabled";
  	};
  
+ 	usb_host2_xhci: usb@fcd00000 {
+ 		compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
+ 		reg = <0x0 0xfcd00000 0x0 0x400000>;
+ 		interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH 0>;
+ 		clocks = <&cru REF_CLK_USB3OTG2>, <&cru SUSPEND_CLK_USB3OTG2>,
+ 			 <&cru ACLK_USB3OTG2>, <&cru CLK_UTMI_OTG2>,
+ 			 <&cru CLK_PIPEPHY2_PIPE_U3_G>;
+ 		clock-names = "ref_clk", "suspend_clk", "bus_clk", "utmi", "pipe";
+ 		dr_mode = "host";
+ 		phys = <&combphy2_psu PHY_TYPE_USB3>;
+ 		phy-names = "usb3-phy";
+ 		phy_type = "utmi_wide";
+ 		resets = <&cru SRST_A_USB3OTG2>;
+ 		snps,dis_enblslpm_quirk;
+ 		snps,dis-u2-freeclk-exists-quirk;
+ 		snps,dis-del-phy-power-chg-quirk;
+ 		snps,dis-tx-ipgap-linecheck-quirk;
+ 		snps,dis_rxdet_inp3_quirk;
+ 		status = "disabled";
+ 	};
+ 
 +	pmu1grf: syscon@fd58a000 {
 +		compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd";
 +		reg = <0x0 0xfd58a000 0x0 0x10000>;
 +	};
 +
  	sys_grf: syscon@fd58c000 {
  		compatible = "rockchip,rk3588-sys-grf", "syscon";
  		reg = <0x0 0xfd58c000 0x0 0x1000>;