Subject: linux-next: manual merge of the usb tree with the usb.current tree

From: Stephen Rothwell <[email-masked]>
Date: Fri, 26 Apr 2024 14:48:48 +1000

Hi all,

Today's linux-next merge of the usb tree got a conflict in:

  drivers/usb/dwc3/core.c

between commit:

  6d735722063a ("usb: dwc3: core: Prevent phy suspend during init")

from the usb.current tree and commit:

  30a46746ca5a ("usb: dwc3: core: Refactor PHY logic to support Multiport Controller")

from the usb tree.

I fixed it up (I think - see below) and can carry the fix as
necessary. This is now fixed as far as linux-next is concerned, but any
non trivial conflicts should be mentioned to your upstream maintainer
when your tree is submitted for merging.  You may also want to consider
cooperating with the maintainer of the conflicting tree to minimise any
particularly complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/usb/dwc3/core.c
index 100041320e8d,4dc6fc79c6d9..000000000000
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@@ -104,27 -105,6 +105,30 @@@ static int dwc3_get_dr_mode(struct dwc
  	return 0;
  }
  
 +void dwc3_enable_susphy(struct dwc3 *dwc, bool enable)
 +{
 +	u32 reg;
++	int i;
 +
- 	reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
- 	if (enable && !dwc->dis_u3_susphy_quirk)
- 		reg |= DWC3_GUSB3PIPECTL_SUSPHY;
- 	else
- 		reg &= ~DWC3_GUSB3PIPECTL_SUSPHY;
++	for (i = 0; i < dwc->num_usb3_ports; i++) {
++		reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(i));
++		if (enable && !dwc->dis_u3_susphy_quirk)
++			reg |= DWC3_GUSB3PIPECTL_SUSPHY;
++		else
++			reg &= ~DWC3_GUSB3PIPECTL_SUSPHY;
++		dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(i), reg);
++	}
 +
- 	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
- 
- 	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
- 	if (enable && !dwc->dis_u2_susphy_quirk)
- 		reg |= DWC3_GUSB2PHYCFG_SUSPHY;
- 	else
- 		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
- 
- 	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
++	for (i = 0; i < dwc->num_usb2_ports; i++) {
++		reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i));
++		if (enable && !dwc->dis_u2_susphy_quirk)
++			reg |= DWC3_GUSB2PHYCFG_SUSPHY;
++		else
++			reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
++		dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg);
++	}
 +}
 +
  void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode)
  {
  	u32 reg;
@@@ -596,19 -594,14 +618,11 @@@ static int dwc3_core_ulpi_init(struct d
  	return ret;
  }
  
- /**
-  * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core
-  * @dwc: Pointer to our controller context structure
-  *
-  * Returns 0 on success. The USB PHY interfaces are configured but not
-  * initialized. The PHY interfaces and the PHYs get initialized together with
-  * the core in dwc3_core_init.
-  */
- static int dwc3_phy_setup(struct dwc3 *dwc)
+ static int dwc3_ss_phy_setup(struct dwc3 *dwc, int index)
  {
 -	unsigned int hw_mode;
  	u32 reg;
  
- 	reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
 -	hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0);
 -
+ 	reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(index));
  
  	/*
  	 * Make sure UX_EXIT_PX is cleared as that causes issues with some