Subject: linux-next: manual merge of the drm tree with the drm-intel-fixes tree

From: Stephen Rothwell <[email-masked]>
Date: Thu, 29 Aug 2024 10:49:43 +1000

Hi all,

Today's linux-next merge of the drm tree got conflicts in:

  drivers/gpu/drm/i915/display/intel_dp_mst.c
  drivers/gpu/drm/i915/display/intel_dp_mst.h

between commit:

  a2ccc33b88e2 ("drm/i915/dp_mst: Fix MST state after a sink reset")

from the drm-intel-fixes tree and commit:

  e44bc451aa4b ("drm/i915/dp_mst: Ensure link parameters are up-to-date for a disabled link")

from the drm tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/gpu/drm/i915/display/intel_dp_mst.c
index 17978a1f9ab0,45d2230d1801..000000000000
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@@ -1999,42 -2033,32 +2033,72 @@@ bool intel_dp_mst_crtc_needs_modeset(st
  	return false;
  }
  
 +/*
 + * intel_dp_mst_verify_dpcd_state - verify the MST SW enabled state wrt. the DPCD
 + * @intel_dp: DP port object
 + *
 + * Verify if @intel_dp's MST enabled SW state matches the corresponding DPCD
 + * state. A long HPD pulse - not long enough to be detected as a disconnected
 + * state - could've reset the DPCD state, which requires tearing
 + * down/recreating the MST topology.
 + *
 + * Returns %true if the SW MST enabled and DPCD states match, %false
 + * otherwise.
 + */
 +bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp)
 +{
 +	struct intel_display *display = to_intel_display(intel_dp);
 +	struct intel_connector *connector = intel_dp->attached_connector;
 +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 +	struct intel_encoder *encoder = &dig_port->base;
 +	int ret;
 +	u8 val;
 +
 +	if (!intel_dp->is_mst)
 +		return true;
 +
 +	ret = drm_dp_dpcd_readb(intel_dp->mst_mgr.aux, DP_MSTM_CTRL, &val);
 +
 +	/* Adjust the expected register value for SST + SideBand. */
 +	if (ret < 0 || val != (DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC)) {
 +		drm_dbg_kms(display->drm,
 +			    "[CONNECTOR:%d:%s][ENCODER:%d:%s] MST mode got reset, removing topology (ret=%d, ctrl=0x%02x)\n",
 +			    connector->base.base.id, connector->base.name,
 +			    encoder->base.base.id, encoder->base.name,
 +			    ret, val);
 +
 +		return false;
 +	}
 +
 +	return true;
 +}
++
+ /**
+  * intel_dp_mst_prepare_probe - Prepare an MST link for topology probing
+  * @intel_dp: DP port object
+  *
+  * Prepare an MST link for topology probing, programming the target
+  * link parameters to DPCD. This step is a requirement of the enumaration
+  * of path resources during probing.
+  */
+ void intel_dp_mst_prepare_probe(struct intel_dp *intel_dp)
+ {
+ 	int link_rate = intel_dp_max_link_rate(intel_dp);
+ 	int lane_count = intel_dp_max_lane_count(intel_dp);
+ 	u8 rate_select;
+ 	u8 link_bw;
+ 
+ 	if (intel_dp->link_trained)
+ 		return;
+ 
+ 	if (intel_mst_probed_link_params_valid(intel_dp, link_rate, lane_count))
+ 		return;
+ 
+ 	intel_dp_compute_rate(intel_dp, link_rate, &link_bw, &rate_select);
+ 
+ 	intel_dp_link_training_set_mode(intel_dp, link_rate, false);
+ 	intel_dp_link_training_set_bw(intel_dp, link_bw, rate_select, lane_count,
+ 				      drm_dp_enhanced_frame_cap(intel_dp->dpcd));
+ 
+ 	intel_mst_set_probed_link_params(intel_dp, link_rate, lane_count);
+ }
diff --cc drivers/gpu/drm/i915/display/intel_dp_mst.h
index 9e4c7679f1c3,fba76454fa67..000000000000
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.h
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.h
@@@ -27,6 -27,6 +27,7 @@@ int intel_dp_mst_atomic_check_link(stru
  				   struct intel_link_bw_limits *limits);
  bool intel_dp_mst_crtc_needs_modeset(struct intel_atomic_state *state,
  				     struct intel_crtc *crtc);
 +bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp);
+ void intel_dp_mst_prepare_probe(struct intel_dp *intel_dp);
  
  #endif /* __INTEL_DP_MST_H__ */