Subject: linux-next: manual merge of the kvm-riscv tree with the risc-v tree

From: Stephen Rothwell <[email-masked]>
Date: Fri, 22 Nov 2024 14:58:09 +1100

Hi all,

Today's linux-next merge of the kvm-riscv tree got a conflict in:

  arch/riscv/include/asm/hwcap.h

between commits:

  2e6f6ea452aa ("riscv: Add ISA extension parsing for pointer masking")
  1658ef4314b3 ("riscv: Implement cmpxchg8/16() using Zabha")
  2d36fe89d872 ("riscv: Add ISA extension parsing for Ziccrse")
  64f7b77f0bd9 ("Merge patch series "Zacas/Zabha support and qspinlocks"")

from the risc-v tree and commit:

  94a7734d0967 ("RISC-V: Add Svade and Svadu Extensions Support")

from the kvm-riscv tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc arch/riscv/include/asm/hwcap.h
index 08d2a5697466,7f72789ba3d5..000000000000
--- a/arch/riscv/include/asm/hwcap.h
+++ b/arch/riscv/include/asm/hwcap.h
@@@ -93,11 -93,8 +93,13 @@@
  #define RISCV_ISA_EXT_ZCMOP		84
  #define RISCV_ISA_EXT_ZAWRS		85
  #define RISCV_ISA_EXT_SVVPTC		86
 -#define RISCV_ISA_EXT_SVADE		87
 -#define RISCV_ISA_EXT_SVADU		88
 +#define RISCV_ISA_EXT_SMMPM		87
 +#define RISCV_ISA_EXT_SMNPM		88
 +#define RISCV_ISA_EXT_SSNPM		89
 +#define RISCV_ISA_EXT_ZABHA		90
 +#define RISCV_ISA_EXT_ZICCRSE		91
++#define RISCV_ISA_EXT_SVADE		92
++#define RISCV_ISA_EXT_SVADU		93
  
  #define RISCV_ISA_EXT_XLINUXENVCFG	127